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Data Structures</h2></td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_vdma___config.html">XAxiVdma_Config</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">This typedef contains the hardware configuration information for a VDMA device.  <a href="struct_x_axi_vdma___config.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_axi_vdma___dma_setup.html" title="The XAxiVdma_DmaSetup structure contains all the necessary information to start a frame write or read...">XAxiVdma_DmaSetup</a> structure contains all the necessary information to start a frame write or read.  <a href="struct_x_axi_vdma___dma_setup.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_vdma___frame_counter.html">XAxiVdma_FrameCounter</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The XAxiVdmaFrameCounter structure contains the interrupt threshold settings for both the transmit and the receive channel.  <a href="struct_x_axi_vdma___frame_counter.html#details">More...</a><br/></td></tr>
<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_vdma___channel_call_back.html">XAxiVdma_ChannelCallBack</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel callback functions.  <a href="struct_x_axi_vdma___channel_call_back.html#details">More...</a><br/></td></tr>
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<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a></td></tr>
<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">The <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> driver instance data.  <a href="struct_x_axi_vdma.html#details">More...</a><br/></td></tr>
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Macros</h2></td></tr>
<tr class="memitem:ga525d0fa8fc04a9dde871ab55cf6b227b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga525d0fa8fc04a9dde871ab55cf6b227b"><td class="mdescLeft">&#160;</td><td class="mdescRight">VDMA data transfer direction.  <a href="#ga525d0fa8fc04a9dde871ab55cf6b227b">More...</a><br/></td></tr>
<tr class="separator:ga525d0fa8fc04a9dde871ab55cf6b227b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fa27b3ce66d947167262fe918fb5373"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ga5fa27b3ce66d947167262fe918fb5373"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA transfer from memory.  <a href="#ga5fa27b3ce66d947167262fe918fb5373">More...</a><br/></td></tr>
<tr class="separator:ga5fa27b3ce66d947167262fe918fb5373"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga001373abfc5971ca63943b4088f58e60"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga001373abfc5971ca63943b4088f58e60">XAXIVDMA_CHAN_FSYNC</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga001373abfc5971ca63943b4088f58e60"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame Sync Source Selection.  <a href="#ga001373abfc5971ca63943b4088f58e60">More...</a><br/></td></tr>
<tr class="separator:ga001373abfc5971ca63943b4088f58e60"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae49d9133e0ce94d33014c1277b1a4002"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae49d9133e0ce94d33014c1277b1a4002">XAXIVDMA_EXTERNAL_GENLOCK</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:gae49d9133e0ce94d33014c1277b1a4002"><td class="mdescLeft">&#160;</td><td class="mdescRight">GenLock Source Selection.  <a href="#gae49d9133e0ce94d33014c1277b1a4002">More...</a><br/></td></tr>
<tr class="separator:gae49d9133e0ce94d33014c1277b1a4002"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36e2b755a604e36829faf28153035830"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga36e2b755a604e36829faf28153035830">XAXIVDMA_GENLOCK_MASTER</a>&#160;&#160;&#160;0</td></tr>
<tr class="memdesc:ga36e2b755a604e36829faf28153035830"><td class="mdescLeft">&#160;</td><td class="mdescRight">GenLock Mode Constants.  <a href="#ga36e2b755a604e36829faf28153035830">More...</a><br/></td></tr>
<tr class="separator:ga36e2b755a604e36829faf28153035830"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c57db0180eafe041035a8d4781cb2b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga4c57db0180eafe041035a8d4781cb2b9">XAXIVDMA_HANDLER_GENERAL</a>&#160;&#160;&#160;1</td></tr>
<tr class="memdesc:ga4c57db0180eafe041035a8d4781cb2b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt type for setting up callback.  <a href="#ga4c57db0180eafe041035a8d4781cb2b9">More...</a><br/></td></tr>
<tr class="separator:ga4c57db0180eafe041035a8d4781cb2b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ed954b5de3073f15b8e47c5736d627b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7ed954b5de3073f15b8e47c5736d627b">XAXIVDMA_HANDLER_ERROR</a>&#160;&#160;&#160;2</td></tr>
<tr class="memdesc:ga7ed954b5de3073f15b8e47c5736d627b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error Interrupt Type.  <a href="#ga7ed954b5de3073f15b8e47c5736d627b">More...</a><br/></td></tr>
<tr class="separator:ga7ed954b5de3073f15b8e47c5736d627b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafa8a6604771dc02e3a96eb09ac16fcaa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gafa8a6604771dc02e3a96eb09ac16fcaa">XAXIVDMA_DEVICE_READY</a>&#160;&#160;&#160;0x11111111</td></tr>
<tr class="memdesc:gafa8a6604771dc02e3a96eb09ac16fcaa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Flag to signal that device is ready to be used.  <a href="#gafa8a6604771dc02e3a96eb09ac16fcaa">More...</a><br/></td></tr>
<tr class="separator:gafa8a6604771dc02e3a96eb09ac16fcaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaef1fd25fb7d569716f06428a2cb252a6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaef1fd25fb7d569716f06428a2cb252a6">XAXIVDMA_ENABLE_DBG_THRESHOLD_REG</a>&#160;&#160;&#160;0x01</td></tr>
<tr class="memdesc:gaef1fd25fb7d569716f06428a2cb252a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Debug Configuration Parameter Constants (C_ENABLE_DEBUG_INFO_*)  <a href="#gaef1fd25fb7d569716f06428a2cb252a6">More...</a><br/></td></tr>
<tr class="separator:gaef1fd25fb7d569716f06428a2cb252a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac1022ff84a093476cff8499bc4bbaae2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac1022ff84a093476cff8499bc4bbaae2">XAxiVdma_ChannelHiFrmAddrEnable</a>(Channel)</td></tr>
<tr class="memdesc:gac1022ff84a093476cff8499bc4bbaae2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel to enable access to higher Frame Buffer Addresses (SG=0)  <a href="#gac1022ff84a093476cff8499bc4bbaae2">More...</a><br/></td></tr>
<tr class="separator:gac1022ff84a093476cff8499bc4bbaae2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf3790410e85baac4ef181f1b77c8cdf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaaf3790410e85baac4ef181f1b77c8cdf">XAxiVdma_ChannelHiFrmAddrDisable</a>(Channel)</td></tr>
<tr class="memdesc:gaaf3790410e85baac4ef181f1b77c8cdf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel to disable access higher Frame Buffer Addresses (SG=0)  <a href="#gaaf3790410e85baac4ef181f1b77c8cdf">More...</a><br/></td></tr>
<tr class="separator:gaaf3790410e85baac4ef181f1b77c8cdf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaebbb18b57a2957ab4a90b54c4f557fea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaebbb18b57a2957ab4a90b54c4f557fea">XAXIVDMA_MISMATCH_ERROR</a>&#160;&#160;&#160;0x80000010</td></tr>
<tr class="memdesc:gaebbb18b57a2957ab4a90b54c4f557fea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame/Line Mismatch Error This is a typical DMA Internal Error, which on detection doesnt require a reset (as opposed to other errors).  <a href="#gaebbb18b57a2957ab4a90b54c4f557fea">More...</a><br/></td></tr>
<tr class="separator:gaebbb18b57a2957ab4a90b54c4f557fea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac657067221649df8f259f9215bfba75e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>(BaseAddress, RegOffset)&#160;&#160;&#160;XAxiVdma_In32((BaseAddress) + (RegOffset))</td></tr>
<tr class="memdesc:gac657067221649df8f259f9215bfba75e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the given register.  <a href="#gac657067221649df8f259f9215bfba75e">More...</a><br/></td></tr>
<tr class="separator:gac657067221649df8f259f9215bfba75e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga28900a15d22fc5a3729dfa102f5cbec9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>(BaseAddress, RegOffset, Data)&#160;&#160;&#160;XAxiVdma_Out32((BaseAddress) + (RegOffset), (Data))</td></tr>
<tr class="memdesc:ga28900a15d22fc5a3729dfa102f5cbec9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write the given register.  <a href="#ga28900a15d22fc5a3729dfa102f5cbec9">More...</a><br/></td></tr>
<tr class="separator:ga28900a15d22fc5a3729dfa102f5cbec9"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Typedefs</h2></td></tr>
<tr class="memitem:ga07f81ffdbceb0024e3a675a787ca3d90"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga07f81ffdbceb0024e3a675a787ca3d90">XAxiVdma_CallBack</a> )(void *CallBackRef, u32 InterruptTypes)</td></tr>
<tr class="memdesc:ga07f81ffdbceb0024e3a675a787ca3d90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type for general interrupts.  <a href="#ga07f81ffdbceb0024e3a675a787ca3d90">More...</a><br/></td></tr>
<tr class="separator:ga07f81ffdbceb0024e3a675a787ca3d90"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf4cafedb40698ffa21e672bf20ac3602"><td class="memItemLeft" align="right" valign="top">typedef void(*&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf4cafedb40698ffa21e672bf20ac3602">XAxiVdma_ErrorCallBack</a> )(void *CallBackRef, u32 ErrorMask)</td></tr>
<tr class="memdesc:gaf4cafedb40698ffa21e672bf20ac3602"><td class="mdescLeft">&#160;</td><td class="mdescRight">Callback type for Error interrupt.  <a href="#gaf4cafedb40698ffa21e672bf20ac3602">More...</a><br/></td></tr>
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Functions</h2></td></tr>
<tr class="memitem:ga0eecc03385d10b80e8b17ff834033ac4"><td class="memItemLeft" align="right" valign="top">XAxiVdma_Channel *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga0eecc03385d10b80e8b17ff834033ac4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get a channel.  <a href="#ga0eecc03385d10b80e8b17ff834033ac4">More...</a><br/></td></tr>
<tr class="separator:ga0eecc03385d10b80e8b17ff834033ac4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7dff0c11a9aa88a19519734702904dca"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, <a class="el" href="struct_x_axi_vdma___config.html">XAxiVdma_Config</a> *CfgPtr, UINTPTR EffectiveAddr)</td></tr>
<tr class="memdesc:ga7dff0c11a9aa88a19519734702904dca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize the driver with hardware configuration.  <a href="#ga7dff0c11a9aa88a19519734702904dca">More...</a><br/></td></tr>
<tr class="separator:ga7dff0c11a9aa88a19519734702904dca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8dbd2faa070ca571f049e3b61f9bdb1e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8dbd2faa070ca571f049e3b61f9bdb1e">XAxiVdma_Reset</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga8dbd2faa070ca571f049e3b61f9bdb1e"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets one DMA channel.  <a href="#ga8dbd2faa070ca571f049e3b61f9bdb1e">More...</a><br/></td></tr>
<tr class="separator:ga8dbd2faa070ca571f049e3b61f9bdb1e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e01bd69f101126d5962f7078ee3e520"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3e01bd69f101126d5962f7078ee3e520">XAxiVdma_ResetNotDone</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga3e01bd69f101126d5962f7078ee3e520"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks one DMA channel for reset completion.  <a href="#ga3e01bd69f101126d5962f7078ee3e520">More...</a><br/></td></tr>
<tr class="separator:ga3e01bd69f101126d5962f7078ee3e520"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0fc5b39aabb8d4f56b0dd2024ea5bff2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0fc5b39aabb8d4f56b0dd2024ea5bff2">XAxiVdma_IsBusy</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga0fc5b39aabb8d4f56b0dd2024ea5bff2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether a DMA channel is busy.  <a href="#ga0fc5b39aabb8d4f56b0dd2024ea5bff2">More...</a><br/></td></tr>
<tr class="separator:ga0fc5b39aabb8d4f56b0dd2024ea5bff2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9769479907cda3ef95ff1ed394de4629"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga9769479907cda3ef95ff1ed394de4629"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current frame that hardware is working on.  <a href="#ga9769479907cda3ef95ff1ed394de4629">More...</a><br/></td></tr>
<tr class="separator:ga9769479907cda3ef95ff1ed394de4629"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga24f182cf8678e4df6e0e2b19e2f50620"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga24f182cf8678e4df6e0e2b19e2f50620">XAxiVdma_GetVersion</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga24f182cf8678e4df6e0e2b19e2f50620"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the version of the hardware.  <a href="#ga24f182cf8678e4df6e0e2b19e2f50620">More...</a><br/></td></tr>
<tr class="separator:ga24f182cf8678e4df6e0e2b19e2f50620"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga15653f0679e3a33efd384598b6c42e08"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga15653f0679e3a33efd384598b6c42e08">XAxiVdma_GetStatus</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga15653f0679e3a33efd384598b6c42e08"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the status of a channel.  <a href="#ga15653f0679e3a33efd384598b6c42e08">More...</a><br/></td></tr>
<tr class="separator:ga15653f0679e3a33efd384598b6c42e08"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga741b4b1607c2ee71a3be16ddd8300656"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, int LineBufThreshold, u16 Direction)</td></tr>
<tr class="memdesc:ga741b4b1607c2ee71a3be16ddd8300656"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure Line Buffer Threshold.  <a href="#ga741b4b1607c2ee71a3be16ddd8300656">More...</a><br/></td></tr>
<tr class="separator:ga741b4b1607c2ee71a3be16ddd8300656"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa3376589f8781eec1f0d619e1a0d3078"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 Source, u16 Direction)</td></tr>
<tr class="memdesc:gaa3376589f8781eec1f0d619e1a0d3078"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure Frame Sync Source and valid only when C_USE_FSYNC is enabled.  <a href="#gaa3376589f8781eec1f0d619e1a0d3078">More...</a><br/></td></tr>
<tr class="separator:gaa3376589f8781eec1f0d619e1a0d3078"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacf7ed6b0ef406b80e49ff25634f6d5f1"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 Source, u16 Direction)</td></tr>
<tr class="memdesc:gacf7ed6b0ef406b80e49ff25634f6d5f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure Gen Lock Source.  <a href="#gacf7ed6b0ef406b80e49ff25634f6d5f1">More...</a><br/></td></tr>
<tr class="separator:gacf7ed6b0ef406b80e49ff25634f6d5f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf99dd7738b98367397831df26433843a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, int FrameIndex, u16 Direction)</td></tr>
<tr class="memdesc:gaf99dd7738b98367397831df26433843a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start parking mode on a certain frame.  <a href="#gaf99dd7738b98367397831df26433843a">More...</a><br/></td></tr>
<tr class="separator:gaf99dd7738b98367397831df26433843a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8625bbc0ed0ab829f3153160c74bba44"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8625bbc0ed0ab829f3153160c74bba44">XAxiVdma_StopParking</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga8625bbc0ed0ab829f3153160c74bba44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Exit parking mode, the channel will return to circular buffer mode.  <a href="#ga8625bbc0ed0ab829f3153160c74bba44">More...</a><br/></td></tr>
<tr class="separator:ga8625bbc0ed0ab829f3153160c74bba44"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f05c5a75fdf840517c17d687443510d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga4f05c5a75fdf840517c17d687443510d">XAxiVdma_StartFrmCntEnable</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga4f05c5a75fdf840517c17d687443510d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start frame count enable on one channel.  <a href="#ga4f05c5a75fdf840517c17d687443510d">More...</a><br/></td></tr>
<tr class="separator:ga4f05c5a75fdf840517c17d687443510d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab14c0b0487aeb3347b289eb58453e75d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab14c0b0487aeb3347b289eb58453e75d">XAxiVdma_SetBdAddrs</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 BdAddrPhys, u32 BdAddrVirt, int NumBds, u16 Direction)</td></tr>
<tr class="memdesc:gab14c0b0487aeb3347b289eb58453e75d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set BD addresses to be different.  <a href="#gab14c0b0487aeb3347b289eb58453e75d">More...</a><br/></td></tr>
<tr class="separator:gab14c0b0487aeb3347b289eb58453e75d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1dc126d885558e03cf06a4d9c05d5668"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga1dc126d885558e03cf06a4d9c05d5668">XAxiVdma_StartWriteFrame</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, <a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *DmaConfigPtr)</td></tr>
<tr class="memdesc:ga1dc126d885558e03cf06a4d9c05d5668"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a write operation.  <a href="#ga1dc126d885558e03cf06a4d9c05d5668">More...</a><br/></td></tr>
<tr class="separator:ga1dc126d885558e03cf06a4d9c05d5668"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab2646b6aeea2ff64c4b42319ffb49804"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab2646b6aeea2ff64c4b42319ffb49804">XAxiVdma_StartReadFrame</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, <a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *DmaConfigPtr)</td></tr>
<tr class="memdesc:gab2646b6aeea2ff64c4b42319ffb49804"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a read operation.  <a href="#gab2646b6aeea2ff64c4b42319ffb49804">More...</a><br/></td></tr>
<tr class="separator:gab2646b6aeea2ff64c4b42319ffb49804"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3c50e96d431d9f1ee7d6200266c0dbd3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3c50e96d431d9f1ee7d6200266c0dbd3">XAxiVdma_DmaConfig</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction, <a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *DmaConfigPtr)</td></tr>
<tr class="memdesc:ga3c50e96d431d9f1ee7d6200266c0dbd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure one DMA channel using the configuration structure.  <a href="#ga3c50e96d431d9f1ee7d6200266c0dbd3">More...</a><br/></td></tr>
<tr class="separator:ga3c50e96d431d9f1ee7d6200266c0dbd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8fa5b3e7978fda9bde7498a9d4af3c73"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8fa5b3e7978fda9bde7498a9d4af3c73">XAxiVdma_DmaSetBufferAddr</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction, UINTPTR *BufferAddrSet)</td></tr>
<tr class="memdesc:ga8fa5b3e7978fda9bde7498a9d4af3c73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure buffer addresses for one DMA channel.  <a href="#ga8fa5b3e7978fda9bde7498a9d4af3c73">More...</a><br/></td></tr>
<tr class="separator:ga8fa5b3e7978fda9bde7498a9d4af3c73"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf310ae3bd4c0ae9ebf3e445a2fbe444"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gadf310ae3bd4c0ae9ebf3e445a2fbe444">XAxiVdma_DmaStart</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:gadf310ae3bd4c0ae9ebf3e445a2fbe444"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start one DMA channel.  <a href="#gadf310ae3bd4c0ae9ebf3e445a2fbe444">More...</a><br/></td></tr>
<tr class="separator:gadf310ae3bd4c0ae9ebf3e445a2fbe444"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga133b5fd1032db27366382885d6d76484"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga133b5fd1032db27366382885d6d76484">XAxiVdma_DmaStop</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga133b5fd1032db27366382885d6d76484"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop one DMA channel.  <a href="#ga133b5fd1032db27366382885d6d76484">More...</a><br/></td></tr>
<tr class="separator:ga133b5fd1032db27366382885d6d76484"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab51f0d1f195db6af2dd3023e5c80eb5c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab51f0d1f195db6af2dd3023e5c80eb5c">XAxiVdma_DmaRegisterDump</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:gab51f0d1f195db6af2dd3023e5c80eb5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dump registers of one DMA channel.  <a href="#gab51f0d1f195db6af2dd3023e5c80eb5c">More...</a><br/></td></tr>
<tr class="separator:gab51f0d1f195db6af2dd3023e5c80eb5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaabe404c2a5c1483bc95be749c7540ba4"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, <a class="el" href="struct_x_axi_vdma___frame_counter.html">XAxiVdma_FrameCounter</a> *CfgPtr)</td></tr>
<tr class="memdesc:gaabe404c2a5c1483bc95be749c7540ba4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the frame counter and delay counter for both channels.  <a href="#gaabe404c2a5c1483bc95be749c7540ba4">More...</a><br/></td></tr>
<tr class="separator:gaabe404c2a5c1483bc95be749c7540ba4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabb2cecf1628ce8f7b42ffca3608bdf70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, <a class="el" href="struct_x_axi_vdma___frame_counter.html">XAxiVdma_FrameCounter</a> *CfgPtr)</td></tr>
<tr class="memdesc:gabb2cecf1628ce8f7b42ffca3608bdf70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the frame counter and delay counter for both channels.  <a href="#gabb2cecf1628ce8f7b42ffca3608bdf70">More...</a><br/></td></tr>
<tr class="separator:gabb2cecf1628ce8f7b42ffca3608bdf70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf331929e09bf1454dc2835b6ecc4ff30"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u8 FrmStoreNum, u16 Direction)</td></tr>
<tr class="memdesc:gaf331929e09bf1454dc2835b6ecc4ff30"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the number of frame store buffers to use.  <a href="#gaf331929e09bf1454dc2835b6ecc4ff30">More...</a><br/></td></tr>
<tr class="separator:gaf331929e09bf1454dc2835b6ecc4ff30"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83d55bee4a575b0fdd98d1013a26533e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga83d55bee4a575b0fdd98d1013a26533e">XAxiVdma_GetFrmStore</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u8 *FrmStoreNum, u16 Direction)</td></tr>
<tr class="memdesc:ga83d55bee4a575b0fdd98d1013a26533e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the number of frame store buffers to use.  <a href="#ga83d55bee4a575b0fdd98d1013a26533e">More...</a><br/></td></tr>
<tr class="separator:ga83d55bee4a575b0fdd98d1013a26533e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4d93d3dea2f117948c175371d983a0e1"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga4d93d3dea2f117948c175371d983a0e1">XAxiVdma_GetDmaChannelErrors</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga4d93d3dea2f117948c175371d983a0e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check for DMA Channel Errors.  <a href="#ga4d93d3dea2f117948c175371d983a0e1">More...</a><br/></td></tr>
<tr class="separator:ga4d93d3dea2f117948c175371d983a0e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac01b1199d15a3a95cafb01f61dd1d0d3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac01b1199d15a3a95cafb01f61dd1d0d3">XAxiVdma_ClearDmaChannelErrors</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction, u32 ErrorMask)</td></tr>
<tr class="memdesc:gac01b1199d15a3a95cafb01f61dd1d0d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear DMA Channel Errors.  <a href="#gac01b1199d15a3a95cafb01f61dd1d0d3">More...</a><br/></td></tr>
<tr class="separator:gac01b1199d15a3a95cafb01f61dd1d0d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0188e06158c255eba62f52141cff5d84"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_vdma___config.html">XAxiVdma_Config</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0188e06158c255eba62f52141cff5d84">XAxiVdma_LookupConfig</a> (u16 DeviceId)</td></tr>
<tr class="memdesc:ga0188e06158c255eba62f52141cff5d84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Look up the hardware configuration for a device instance.  <a href="#ga0188e06158c255eba62f52141cff5d84">More...</a><br/></td></tr>
<tr class="separator:ga0188e06158c255eba62f52141cff5d84"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4c687431dde198458fb4e42dff22c106"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga4c687431dde198458fb4e42dff22c106">XAxiVdma_IntrEnable</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 IntrType, u16 Direction)</td></tr>
<tr class="memdesc:ga4c687431dde198458fb4e42dff22c106"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable specific interrupts for a channel.  <a href="#ga4c687431dde198458fb4e42dff22c106">More...</a><br/></td></tr>
<tr class="separator:ga4c687431dde198458fb4e42dff22c106"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba9a0ebdb72696e24ccaa48e57802323"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaba9a0ebdb72696e24ccaa48e57802323">XAxiVdma_IntrDisable</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 IntrType, u16 Direction)</td></tr>
<tr class="memdesc:gaba9a0ebdb72696e24ccaa48e57802323"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable specific interrupts for a channel.  <a href="#gaba9a0ebdb72696e24ccaa48e57802323">More...</a><br/></td></tr>
<tr class="separator:gaba9a0ebdb72696e24ccaa48e57802323"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga90501638e7f1077232443f0a60b3b40d"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga90501638e7f1077232443f0a60b3b40d">XAxiVdma_IntrGetPending</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u16 Direction)</td></tr>
<tr class="memdesc:ga90501638e7f1077232443f0a60b3b40d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the pending interrupts of a channel.  <a href="#ga90501638e7f1077232443f0a60b3b40d">More...</a><br/></td></tr>
<tr class="separator:ga90501638e7f1077232443f0a60b3b40d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaba3bd6f623637f15e16176ea77213b3"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaaba3bd6f623637f15e16176ea77213b3">XAxiVdma_IntrClear</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 IntrType, u16 Direction)</td></tr>
<tr class="memdesc:gaaba3bd6f623637f15e16176ea77213b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear the pending interrupts specified by the bit mask.  <a href="#gaaba3bd6f623637f15e16176ea77213b3">More...</a><br/></td></tr>
<tr class="separator:gaaba3bd6f623637f15e16176ea77213b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2650d7820ff062709d027bff2934cf58"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 ErrorMask, u16 Direction)</td></tr>
<tr class="memdesc:ga2650d7820ff062709d027bff2934cf58"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks the S2MM error interrupt for the provided error mask value.  <a href="#ga2650d7820ff062709d027bff2934cf58">More...</a><br/></td></tr>
<tr class="separator:ga2650d7820ff062709d027bff2934cf58"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60ceb86226e513a16d6776a97fcfa50f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:ga60ceb86226e513a16d6776a97fcfa50f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt handler for the read channel.  <a href="#ga60ceb86226e513a16d6776a97fcfa50f">More...</a><br/></td></tr>
<tr class="separator:ga60ceb86226e513a16d6776a97fcfa50f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaad76f2f6ab41e322ddcd240d2af8140d"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler</a> (void *InstancePtr)</td></tr>
<tr class="memdesc:gaad76f2f6ab41e322ddcd240d2af8140d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt handler for the write channel.  <a href="#gaad76f2f6ab41e322ddcd240d2af8140d">More...</a><br/></td></tr>
<tr class="separator:gaad76f2f6ab41e322ddcd240d2af8140d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd0477fae9534ebd2d2e15cc8885642d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr, u32 HandlerType, void *CallBackFunc, void *CallBackRef, u16 Direction)</td></tr>
<tr class="memdesc:gafd0477fae9534ebd2d2e15cc8885642d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set call back function and call back reference pointer for one channel.  <a href="#gafd0477fae9534ebd2d2e15cc8885642d">More...</a><br/></td></tr>
<tr class="separator:gafd0477fae9534ebd2d2e15cc8885642d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga97041abec8a49ee091440012fec1f7ca"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest</a> (<a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *InstancePtr)</td></tr>
<tr class="memdesc:ga97041abec8a49ee091440012fec1f7ca"><td class="mdescLeft">&#160;</td><td class="mdescRight">Runs a self-test on the driver/device.  <a href="#ga97041abec8a49ee091440012fec1f7ca">More...</a><br/></td></tr>
<tr class="separator:ga97041abec8a49ee091440012fec1f7ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga795e26fb85aa4140db060d731a19efeb"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga795e26fb85aa4140db060d731a19efeb">XAxiVdma_ChannelInit</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga795e26fb85aa4140db060d731a19efeb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a channel of a DMA engine.  <a href="#ga795e26fb85aa4140db060d731a19efeb">More...</a><br/></td></tr>
<tr class="separator:ga795e26fb85aa4140db060d731a19efeb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9b0a1008f3e30f3f031763f108f76405"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga9b0a1008f3e30f3f031763f108f76405"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function checks whether reset operation is done.  <a href="#ga9b0a1008f3e30f3f031763f108f76405">More...</a><br/></td></tr>
<tr class="separator:ga9b0a1008f3e30f3f031763f108f76405"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga96e2798de16d738f378458fa2b7b2f1c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga96e2798de16d738f378458fa2b7b2f1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">This function resets one DMA channel.  <a href="#ga96e2798de16d738f378458fa2b7b2f1c">More...</a><br/></td></tr>
<tr class="separator:ga96e2798de16d738f378458fa2b7b2f1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaaf57ab476eb91e9f41b6d166d2b2d6bb"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:gaaf57ab476eb91e9f41b6d166d2b2d6bb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Check whether a DMA channel is busy.  <a href="#gaaf57ab476eb91e9f41b6d166d2b2d6bb">More...</a><br/></td></tr>
<tr class="separator:gaaf57ab476eb91e9f41b6d166d2b2d6bb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae429b7acc7449fcb805ae013528c9ba0"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae429b7acc7449fcb805ae013528c9ba0">XAxiVdma_ChannelGetStatus</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:gae429b7acc7449fcb805ae013528c9ba0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the current status of a channel.  <a href="#gae429b7acc7449fcb805ae013528c9ba0">More...</a><br/></td></tr>
<tr class="separator:gae429b7acc7449fcb805ae013528c9ba0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga04f4bf5ac18661ceb9c1ef047949e3d8"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga04f4bf5ac18661ceb9c1ef047949e3d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel to run in parking mode.  <a href="#ga04f4bf5ac18661ceb9c1ef047949e3d8">More...</a><br/></td></tr>
<tr class="separator:ga04f4bf5ac18661ceb9c1ef047949e3d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacd5a402e30c5170d9dab22d16ff01336"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:gacd5a402e30c5170d9dab22d16ff01336"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel to run in circular mode, exiting parking mode.  <a href="#gacd5a402e30c5170d9dab22d16ff01336">More...</a><br/></td></tr>
<tr class="separator:gacd5a402e30c5170d9dab22d16ff01336"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga771725985f20173546d5555fb8806a6c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga771725985f20173546d5555fb8806a6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the channel to run in frame count enable mode.  <a href="#ga771725985f20173546d5555fb8806a6c">More...</a><br/></td></tr>
<tr class="separator:ga771725985f20173546d5555fb8806a6c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1703c6dcef193966f4f1db7e6e9e59ce"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga1703c6dcef193966f4f1db7e6e9e59ce">XAxiVdma_ChannelSetBdAddrs</a> (XAxiVdma_Channel *Channel, UINTPTR BdAddrPhys, UINTPTR BdAddrVirt)</td></tr>
<tr class="memdesc:ga1703c6dcef193966f4f1db7e6e9e59ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup BD addresses to a different memory region.  <a href="#ga1703c6dcef193966f4f1db7e6e9e59ce">More...</a><br/></td></tr>
<tr class="separator:ga1703c6dcef193966f4f1db7e6e9e59ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3b9c24a02c4b4f99d40820a647de811d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer</a> (XAxiVdma_Channel *Channel, XAxiVdma_ChannelSetup *ChannelCfgPtr)</td></tr>
<tr class="memdesc:ga3b9c24a02c4b4f99d40820a647de811d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start a transfer.  <a href="#ga3b9c24a02c4b4f99d40820a647de811d">More...</a><br/></td></tr>
<tr class="separator:ga3b9c24a02c4b4f99d40820a647de811d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga74ab4785d21c80a0d4501f0d985213e4"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig</a> (XAxiVdma_Channel *Channel, XAxiVdma_ChannelSetup *ChannelCfgPtr)</td></tr>
<tr class="memdesc:ga74ab4785d21c80a0d4501f0d985213e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure one DMA channel using the configuration structure.  <a href="#ga74ab4785d21c80a0d4501f0d985213e4">More...</a><br/></td></tr>
<tr class="separator:ga74ab4785d21c80a0d4501f0d985213e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14da4fd85b6e6c8009479634bca8527a"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr</a> (XAxiVdma_Channel *Channel, UINTPTR *BufferAddrSet, int NumFrames)</td></tr>
<tr class="memdesc:ga14da4fd85b6e6c8009479634bca8527a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Configure buffer addresses for one DMA channel.  <a href="#ga14da4fd85b6e6c8009479634bca8527a">More...</a><br/></td></tr>
<tr class="separator:ga14da4fd85b6e6c8009479634bca8527a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga91cec5aee2b7126eb128169ddd2b4b4f"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga91cec5aee2b7126eb128169ddd2b4b4f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start one DMA channel.  <a href="#ga91cec5aee2b7126eb128169ddd2b4b4f">More...</a><br/></td></tr>
<tr class="separator:ga91cec5aee2b7126eb128169ddd2b4b4f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga12bb1b451a69ecfc70f55d4fbf7257b0"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga12bb1b451a69ecfc70f55d4fbf7257b0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stop one DMA channel.  <a href="#ga12bb1b451a69ecfc70f55d4fbf7257b0">More...</a><br/></td></tr>
<tr class="separator:ga12bb1b451a69ecfc70f55d4fbf7257b0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga13807c40f1f871a6b2f7cbde9eeab9a8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga13807c40f1f871a6b2f7cbde9eeab9a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dump registers from one DMA channel.  <a href="#ga13807c40f1f871a6b2f7cbde9eeab9a8">More...</a><br/></td></tr>
<tr class="separator:ga13807c40f1f871a6b2f7cbde9eeab9a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga524861abb42dc3da2ed14d5932a3bb5b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt</a> (XAxiVdma_Channel *Channel, u8 FrmCnt, u8 DlyCnt)</td></tr>
<tr class="memdesc:ga524861abb42dc3da2ed14d5932a3bb5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the frame counter and delay counter for one channel.  <a href="#ga524861abb42dc3da2ed14d5932a3bb5b">More...</a><br/></td></tr>
<tr class="separator:ga524861abb42dc3da2ed14d5932a3bb5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3e90ef720feb2a974511d7e2889a2198"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt</a> (XAxiVdma_Channel *Channel, u8 *FrmCnt, u8 *DlyCnt)</td></tr>
<tr class="memdesc:ga3e90ef720feb2a974511d7e2889a2198"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the frame counter and delay counter for both channels.  <a href="#ga3e90ef720feb2a974511d7e2889a2198">More...</a><br/></td></tr>
<tr class="separator:ga3e90ef720feb2a974511d7e2889a2198"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64d6b39bc9e900efe9f14c9961f4da24"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr</a> (XAxiVdma_Channel *Channel, u32 IntrType)</td></tr>
<tr class="memdesc:ga64d6b39bc9e900efe9f14c9961f4da24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable interrupts for a channel.  <a href="#ga64d6b39bc9e900efe9f14c9961f4da24">More...</a><br/></td></tr>
<tr class="separator:ga64d6b39bc9e900efe9f14c9961f4da24"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2daa8c45a82867bedf786957b4154cdc"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr</a> (XAxiVdma_Channel *Channel, u32 IntrType)</td></tr>
<tr class="memdesc:ga2daa8c45a82867bedf786957b4154cdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable interrupts for a channel.  <a href="#ga2daa8c45a82867bedf786957b4154cdc">More...</a><br/></td></tr>
<tr class="separator:ga2daa8c45a82867bedf786957b4154cdc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga361297a60672ab2552754d8a58d3f7ab"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:ga361297a60672ab2552754d8a58d3f7ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get pending interrupts of a channel.  <a href="#ga361297a60672ab2552754d8a58d3f7ab">More...</a><br/></td></tr>
<tr class="separator:ga361297a60672ab2552754d8a58d3f7ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7a8c557bce703f572d4e2dd9e362f489"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear</a> (XAxiVdma_Channel *Channel, u32 IntrType)</td></tr>
<tr class="memdesc:ga7a8c557bce703f572d4e2dd9e362f489"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear interrupts of a channel.  <a href="#ga7a8c557bce703f572d4e2dd9e362f489">More...</a><br/></td></tr>
<tr class="separator:ga7a8c557bce703f572d4e2dd9e362f489"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaccc8d62d87870cb43c048938e405d4e6"><td class="memItemLeft" align="right" valign="top">u32&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr</a> (XAxiVdma_Channel *Channel)</td></tr>
<tr class="memdesc:gaccc8d62d87870cb43c048938e405d4e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the enabled interrupts of a channel.  <a href="#gaccc8d62d87870cb43c048938e405d4e6">More...</a><br/></td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:ga8be3f756a21d2360541a40303a525525"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8be3f756a21d2360541a40303a525525">XAxiVdma_Config::DeviceId</a></td></tr>
<tr class="memdesc:ga8be3f756a21d2360541a40303a525525"><td class="mdescLeft">&#160;</td><td class="mdescRight">DeviceId is the unique ID of the device.  <a href="#ga8be3f756a21d2360541a40303a525525">More...</a><br/></td></tr>
<tr class="separator:ga8be3f756a21d2360541a40303a525525"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga76cf51d7be754a670e697e74966c68cd"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga76cf51d7be754a670e697e74966c68cd">XAxiVdma_Config::BaseAddress</a></td></tr>
<tr class="memdesc:ga76cf51d7be754a670e697e74966c68cd"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">    BaseAddress is the physical base address of the
</pre><p> device's registers  <a href="#ga76cf51d7be754a670e697e74966c68cd">More...</a><br/></td></tr>
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<tr class="memitem:gabbeae935b306619b3e2d41598ea1727e"><td class="memItemLeft" align="right" valign="top">u16&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gabbeae935b306619b3e2d41598ea1727e">XAxiVdma_Config::MaxFrameStoreNum</a></td></tr>
<tr class="memdesc:gabbeae935b306619b3e2d41598ea1727e"><td class="mdescLeft">&#160;</td><td class="mdescRight">The maximum number of Frame Stores.  <a href="#gabbeae935b306619b3e2d41598ea1727e">More...</a><br/></td></tr>
<tr class="separator:gabbeae935b306619b3e2d41598ea1727e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae737875f784d02112726509846784dd1"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae737875f784d02112726509846784dd1">XAxiVdma_Config::HasMm2S</a></td></tr>
<tr class="memdesc:gae737875f784d02112726509846784dd1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hw build has read channel.  <a href="#gae737875f784d02112726509846784dd1">More...</a><br/></td></tr>
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<tr class="memitem:gae673d8167e09607574eafbcebd1f0059"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae673d8167e09607574eafbcebd1f0059">XAxiVdma_Config::HasMm2SDRE</a></td></tr>
<tr class="memdesc:gae673d8167e09607574eafbcebd1f0059"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read channel supports unaligned transfer.  <a href="#gae673d8167e09607574eafbcebd1f0059">More...</a><br/></td></tr>
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<tr class="memitem:gaf7a988cf756f60c718d29e2f3273764b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf7a988cf756f60c718d29e2f3273764b">XAxiVdma_Config::Mm2SWordLen</a></td></tr>
<tr class="memdesc:gaf7a988cf756f60c718d29e2f3273764b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read channel word length.  <a href="#gaf7a988cf756f60c718d29e2f3273764b">More...</a><br/></td></tr>
<tr class="separator:gaf7a988cf756f60c718d29e2f3273764b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac0131f5b3987b78fe975c03f264586a6"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac0131f5b3987b78fe975c03f264586a6">XAxiVdma_Config::HasS2Mm</a></td></tr>
<tr class="memdesc:gac0131f5b3987b78fe975c03f264586a6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hw build has write channel.  <a href="#gac0131f5b3987b78fe975c03f264586a6">More...</a><br/></td></tr>
<tr class="separator:gac0131f5b3987b78fe975c03f264586a6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88e3b8ed3aa34aec7d9936681eadae97"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga88e3b8ed3aa34aec7d9936681eadae97">XAxiVdma_Config::HasS2MmDRE</a></td></tr>
<tr class="memdesc:ga88e3b8ed3aa34aec7d9936681eadae97"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write channel supports unaligned transfer.  <a href="#ga88e3b8ed3aa34aec7d9936681eadae97">More...</a><br/></td></tr>
<tr class="separator:ga88e3b8ed3aa34aec7d9936681eadae97"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaef8758d32c62de587d9e57fed56c01ee"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaef8758d32c62de587d9e57fed56c01ee">XAxiVdma_Config::S2MmWordLen</a></td></tr>
<tr class="memdesc:gaef8758d32c62de587d9e57fed56c01ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write channel word length.  <a href="#gaef8758d32c62de587d9e57fed56c01ee">More...</a><br/></td></tr>
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<tr class="memitem:gaf28619bcd27f94ceaf47bbeb0cb0400c"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf28619bcd27f94ceaf47bbeb0cb0400c">XAxiVdma_Config::HasSG</a></td></tr>
<tr class="memdesc:gaf28619bcd27f94ceaf47bbeb0cb0400c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hardware has SG engine.  <a href="#gaf28619bcd27f94ceaf47bbeb0cb0400c">More...</a><br/></td></tr>
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<tr class="memitem:ga1acfdf764643a690110d0d9bf0094f75"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga1acfdf764643a690110d0d9bf0094f75">XAxiVdma_Config::EnableVIDParamRead</a></td></tr>
<tr class="memdesc:ga1acfdf764643a690110d0d9bf0094f75"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Enable for video parameters in direct register mode.  <a href="#ga1acfdf764643a690110d0d9bf0094f75">More...</a><br/></td></tr>
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<tr class="memitem:gab97aef716c82252eeb7eb12832a31dd5"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab97aef716c82252eeb7eb12832a31dd5">XAxiVdma_Config::UseFsync</a></td></tr>
<tr class="memdesc:gab97aef716c82252eeb7eb12832a31dd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA operations synchronized to Frame Sync.  <a href="#gab97aef716c82252eeb7eb12832a31dd5">More...</a><br/></td></tr>
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<tr class="memitem:ga0ff6f00da81986d480ae3baed727e4a9"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0ff6f00da81986d480ae3baed727e4a9">XAxiVdma_Config::FlushonFsync</a></td></tr>
<tr class="memdesc:ga0ff6f00da81986d480ae3baed727e4a9"><td class="mdescLeft">&#160;</td><td class="mdescRight"><pre class="fragment">   VDMA Transactions are flushed &amp; channel states
</pre><p> reset on Frame Sync  <a href="#ga0ff6f00da81986d480ae3baed727e4a9">More...</a><br/></td></tr>
<tr class="separator:ga0ff6f00da81986d480ae3baed727e4a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga14b3296d09ee88ac27a415ca2452a60e"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga14b3296d09ee88ac27a415ca2452a60e">XAxiVdma_Config::Mm2SBufDepth</a></td></tr>
<tr class="memdesc:ga14b3296d09ee88ac27a415ca2452a60e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Depth of Read Channel Line Buffer FIFO.  <a href="#ga14b3296d09ee88ac27a415ca2452a60e">More...</a><br/></td></tr>
<tr class="separator:ga14b3296d09ee88ac27a415ca2452a60e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae165f3cbaa2eb57aa1708743e45aa845"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae165f3cbaa2eb57aa1708743e45aa845">XAxiVdma_Config::S2MmBufDepth</a></td></tr>
<tr class="memdesc:gae165f3cbaa2eb57aa1708743e45aa845"><td class="mdescLeft">&#160;</td><td class="mdescRight">Depth of Write Channel Line Buffer FIFO.  <a href="#gae165f3cbaa2eb57aa1708743e45aa845">More...</a><br/></td></tr>
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<tr class="memitem:ga7057aa6b1b3614612b2b1331ec6afd87"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7057aa6b1b3614612b2b1331ec6afd87">XAxiVdma_Config::Mm2SGenLock</a></td></tr>
<tr class="memdesc:ga7057aa6b1b3614612b2b1331ec6afd87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mm2s Gen Lock Mode.  <a href="#ga7057aa6b1b3614612b2b1331ec6afd87">More...</a><br/></td></tr>
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<tr class="memitem:ga7938ca3c609d8a44a05cf81cde30a4a7"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7938ca3c609d8a44a05cf81cde30a4a7">XAxiVdma_Config::S2MmGenLock</a></td></tr>
<tr class="memdesc:ga7938ca3c609d8a44a05cf81cde30a4a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2Mm Gen Lock Mode.  <a href="#ga7938ca3c609d8a44a05cf81cde30a4a7">More...</a><br/></td></tr>
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<tr class="memitem:ga990e5208e4320a26ca4cc8f50407489d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga990e5208e4320a26ca4cc8f50407489d">XAxiVdma_Config::InternalGenLock</a></td></tr>
<tr class="memdesc:ga990e5208e4320a26ca4cc8f50407489d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal Gen Lock.  <a href="#ga990e5208e4320a26ca4cc8f50407489d">More...</a><br/></td></tr>
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<tr class="memitem:ga7de365f4e644f7d357dfb5aea0ba4241"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7de365f4e644f7d357dfb5aea0ba4241">XAxiVdma_Config::S2MmSOF</a></td></tr>
<tr class="memdesc:ga7de365f4e644f7d357dfb5aea0ba4241"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Start of Flag Enable.  <a href="#ga7de365f4e644f7d357dfb5aea0ba4241">More...</a><br/></td></tr>
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<tr class="memitem:ga569bedc89182bd0542f62580767c98d3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga569bedc89182bd0542f62580767c98d3">XAxiVdma_Config::Mm2SStreamWidth</a></td></tr>
<tr class="memdesc:ga569bedc89182bd0542f62580767c98d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S TData Width.  <a href="#ga569bedc89182bd0542f62580767c98d3">More...</a><br/></td></tr>
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<tr class="memitem:gaf8169029d1b2a372478df2ad52c99ae3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf8169029d1b2a372478df2ad52c99ae3">XAxiVdma_Config::S2MmStreamWidth</a></td></tr>
<tr class="memdesc:gaf8169029d1b2a372478df2ad52c99ae3"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM TData Width.  <a href="#gaf8169029d1b2a372478df2ad52c99ae3">More...</a><br/></td></tr>
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<tr class="memitem:gacda6ef717d6af941e0f0c8dc90185a24"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gacda6ef717d6af941e0f0c8dc90185a24">XAxiVdma_Config::Mm2SThresRegEn</a></td></tr>
<tr class="memdesc:gacda6ef717d6af941e0f0c8dc90185a24"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S Threshold Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_1 configuration parameter.  <a href="#gacda6ef717d6af941e0f0c8dc90185a24">More...</a><br/></td></tr>
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<tr class="memitem:gad04ebadf6c05c481198b6b27e5e9eec8"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad04ebadf6c05c481198b6b27e5e9eec8">XAxiVdma_Config::Mm2SFrmStoreRegEn</a></td></tr>
<tr class="memdesc:gad04ebadf6c05c481198b6b27e5e9eec8"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S Frame Store Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_5 configuration parameter.  <a href="#gad04ebadf6c05c481198b6b27e5e9eec8">More...</a><br/></td></tr>
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<tr class="memitem:ga3f3291160fad20f64ce2e18efcfe8566"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3f3291160fad20f64ce2e18efcfe8566">XAxiVdma_Config::Mm2SDlyCntrEn</a></td></tr>
<tr class="memdesc:ga3f3291160fad20f64ce2e18efcfe8566"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S Delay Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_6 configuration parameter.  <a href="#ga3f3291160fad20f64ce2e18efcfe8566">More...</a><br/></td></tr>
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<tr class="memitem:gaca0e931b1418fda82650456d7639b752"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaca0e931b1418fda82650456d7639b752">XAxiVdma_Config::Mm2SFrmCntrEn</a></td></tr>
<tr class="memdesc:gaca0e931b1418fda82650456d7639b752"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S Frame Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_7 configuration parameter.  <a href="#gaca0e931b1418fda82650456d7639b752">More...</a><br/></td></tr>
<tr class="separator:gaca0e931b1418fda82650456d7639b752"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83e466b0e6d0b8711db0372000009c9b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga83e466b0e6d0b8711db0372000009c9b">XAxiVdma_Config::S2MmThresRegEn</a></td></tr>
<tr class="memdesc:ga83e466b0e6d0b8711db0372000009c9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Threshold Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_9 configuration parameter.  <a href="#ga83e466b0e6d0b8711db0372000009c9b">More...</a><br/></td></tr>
<tr class="separator:ga83e466b0e6d0b8711db0372000009c9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5835e4da4043a081141184f760894960"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga5835e4da4043a081141184f760894960">XAxiVdma_Config::S2MmFrmStoreRegEn</a></td></tr>
<tr class="memdesc:ga5835e4da4043a081141184f760894960"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Frame Store Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_13 configuration parameter.  <a href="#ga5835e4da4043a081141184f760894960">More...</a><br/></td></tr>
<tr class="separator:ga5835e4da4043a081141184f760894960"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga263c9059a1a7220c0d082791d1f99681"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga263c9059a1a7220c0d082791d1f99681">XAxiVdma_Config::S2MmDlyCntrEn</a></td></tr>
<tr class="memdesc:ga263c9059a1a7220c0d082791d1f99681"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Delay Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_14 configuration parameter.  <a href="#ga263c9059a1a7220c0d082791d1f99681">More...</a><br/></td></tr>
<tr class="separator:ga263c9059a1a7220c0d082791d1f99681"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac0f7d3262d6a8a66cb68516be91f9fa0"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac0f7d3262d6a8a66cb68516be91f9fa0">XAxiVdma_Config::S2MmFrmCntrEn</a></td></tr>
<tr class="memdesc:gac0f7d3262d6a8a66cb68516be91f9fa0"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Frame Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_15 configuration parameter.  <a href="#gac0f7d3262d6a8a66cb68516be91f9fa0">More...</a><br/></td></tr>
<tr class="separator:gac0f7d3262d6a8a66cb68516be91f9fa0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3bce37353c26d5b2f077a100cdc7bd4"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae3bce37353c26d5b2f077a100cdc7bd4">XAxiVdma_Config::EnableAllDbgFeatures</a></td></tr>
<tr class="memdesc:gae3bce37353c26d5b2f077a100cdc7bd4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable all Debug features This corresponds to C_ENABLE_DEBUG_ALL configuration parameter.  <a href="#gae3bce37353c26d5b2f077a100cdc7bd4">More...</a><br/></td></tr>
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<tr class="memitem:gaefe77aff2f380aac9be64645ca606696"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaefe77aff2f380aac9be64645ca606696">XAxiVdma_Config::AddrWidth</a></td></tr>
<tr class="memdesc:gaefe77aff2f380aac9be64645ca606696"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address Width.  <a href="#gaefe77aff2f380aac9be64645ca606696">More...</a><br/></td></tr>
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<tr class="memitem:ga759dfd5ee4156f725ec65fe154fa2f89"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga759dfd5ee4156f725ec65fe154fa2f89">XAxiVdma_Config::HasVFlip</a></td></tr>
<tr class="memdesc:ga759dfd5ee4156f725ec65fe154fa2f89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hardware has Vertical Flip enabled(c_enable_vert_flip)  <a href="#ga759dfd5ee4156f725ec65fe154fa2f89">More...</a><br/></td></tr>
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<tr class="memitem:ga251605353cc3af9cc740d568adc1a217"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga251605353cc3af9cc740d568adc1a217">XAxiVdma_Config::IntrParent</a></td></tr>
<tr class="memdesc:ga251605353cc3af9cc740d568adc1a217"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags.  <a href="#ga251605353cc3af9cc740d568adc1a217">More...</a><br/></td></tr>
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<tr class="memitem:ga8539fe046ff0373a8256ca18a2c5e1d3"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8539fe046ff0373a8256ca18a2c5e1d3">XAxiVdma_DmaSetup::VertSizeInput</a></td></tr>
<tr class="memdesc:ga8539fe046ff0373a8256ca18a2c5e1d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical size input.  <a href="#ga8539fe046ff0373a8256ca18a2c5e1d3">More...</a><br/></td></tr>
<tr class="separator:ga8539fe046ff0373a8256ca18a2c5e1d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga11ed1fd062b11845c8573ef4598383ea"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga11ed1fd062b11845c8573ef4598383ea">XAxiVdma_DmaSetup::HoriSizeInput</a></td></tr>
<tr class="memdesc:ga11ed1fd062b11845c8573ef4598383ea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal size input.  <a href="#ga11ed1fd062b11845c8573ef4598383ea">More...</a><br/></td></tr>
<tr class="separator:ga11ed1fd062b11845c8573ef4598383ea"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga080eed5ecf9444cfe6351a244d587aea"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga080eed5ecf9444cfe6351a244d587aea">XAxiVdma_DmaSetup::Stride</a></td></tr>
<tr class="memdesc:ga080eed5ecf9444cfe6351a244d587aea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stride.  <a href="#ga080eed5ecf9444cfe6351a244d587aea">More...</a><br/></td></tr>
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<tr class="memitem:ga35c5f4bb861abceeaf787e047f478b41"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga35c5f4bb861abceeaf787e047f478b41">XAxiVdma_DmaSetup::FrameDelay</a></td></tr>
<tr class="memdesc:ga35c5f4bb861abceeaf787e047f478b41"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame Delay.  <a href="#ga35c5f4bb861abceeaf787e047f478b41">More...</a><br/></td></tr>
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<tr class="memitem:ga26fc64b9d238ee745ae0e388f38e8173"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga26fc64b9d238ee745ae0e388f38e8173">XAxiVdma_DmaSetup::EnableCircularBuf</a></td></tr>
<tr class="memdesc:ga26fc64b9d238ee745ae0e388f38e8173"><td class="mdescLeft">&#160;</td><td class="mdescRight">Circular Buffer Mode?  <a href="#ga26fc64b9d238ee745ae0e388f38e8173">More...</a><br/></td></tr>
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<tr class="memitem:ga6102a47c1f70529681112f365d0f7bb0"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga6102a47c1f70529681112f365d0f7bb0">XAxiVdma_DmaSetup::EnableSync</a></td></tr>
<tr class="memdesc:ga6102a47c1f70529681112f365d0f7bb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gen-Lock Mode?  <a href="#ga6102a47c1f70529681112f365d0f7bb0">More...</a><br/></td></tr>
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<tr class="memitem:gaac365860b37a8b93e667f54f7f8e1e9c"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaac365860b37a8b93e667f54f7f8e1e9c">XAxiVdma_DmaSetup::PointNum</a></td></tr>
<tr class="memdesc:gaac365860b37a8b93e667f54f7f8e1e9c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Master we synchronize with.  <a href="#gaac365860b37a8b93e667f54f7f8e1e9c">More...</a><br/></td></tr>
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<tr class="memitem:ga8a2951097dbc67d90d00778eefd5a656"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8a2951097dbc67d90d00778eefd5a656">XAxiVdma_DmaSetup::EnableFrameCounter</a></td></tr>
<tr class="memdesc:ga8a2951097dbc67d90d00778eefd5a656"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame Counter Enable.  <a href="#ga8a2951097dbc67d90d00778eefd5a656">More...</a><br/></td></tr>
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<tr class="memitem:gaea84e7c0f6497813f1989af6ae6cbf70"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaea84e7c0f6497813f1989af6ae6cbf70">XAxiVdma_DmaSetup::FrameStoreStartAddr</a> [<a class="el" href="group__axivdma.html#ga74cbf8945ca6cf9175bac9d7ad21a1bf">XAXIVDMA_MAX_FRAMESTORE</a>]</td></tr>
<tr class="memdesc:gaea84e7c0f6497813f1989af6ae6cbf70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start Addresses of Frame Store Buffers.  <a href="#gaea84e7c0f6497813f1989af6ae6cbf70">More...</a><br/></td></tr>
<tr class="separator:gaea84e7c0f6497813f1989af6ae6cbf70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga21f79be4ba14288e99cb3eacbdea2a17"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga21f79be4ba14288e99cb3eacbdea2a17">XAxiVdma_DmaSetup::FixedFrameStoreAddr</a></td></tr>
<tr class="memdesc:ga21f79be4ba14288e99cb3eacbdea2a17"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fixed Frame Store Address index.  <a href="#ga21f79be4ba14288e99cb3eacbdea2a17">More...</a><br/></td></tr>
<tr class="separator:ga21f79be4ba14288e99cb3eacbdea2a17"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad770de5bdcc65820b2dca13c0e590854"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad770de5bdcc65820b2dca13c0e590854">XAxiVdma_DmaSetup::GenLockRepeat</a></td></tr>
<tr class="memdesc:gad770de5bdcc65820b2dca13c0e590854"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gen-Lock Repeat?  <a href="#gad770de5bdcc65820b2dca13c0e590854">More...</a><br/></td></tr>
<tr class="separator:gad770de5bdcc65820b2dca13c0e590854"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga857fde2b0a8c8e52b3c3b0b717373a43"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga857fde2b0a8c8e52b3c3b0b717373a43">XAxiVdma_DmaSetup::EnableVFlip</a></td></tr>
<tr class="memdesc:ga857fde2b0a8c8e52b3c3b0b717373a43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical Flip state.  <a href="#ga857fde2b0a8c8e52b3c3b0b717373a43">More...</a><br/></td></tr>
<tr class="separator:ga857fde2b0a8c8e52b3c3b0b717373a43"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa60c173f1c6d7314821ae2c24e2ff7af"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa60c173f1c6d7314821ae2c24e2ff7af">XAxiVdma_FrameCounter::ReadFrameCount</a></td></tr>
<tr class="memdesc:gaa60c173f1c6d7314821ae2c24e2ff7af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt threshold for Receive.  <a href="#gaa60c173f1c6d7314821ae2c24e2ff7af">More...</a><br/></td></tr>
<tr class="separator:gaa60c173f1c6d7314821ae2c24e2ff7af"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga03ffbe1551620b7f0f72b905006dcf88"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga03ffbe1551620b7f0f72b905006dcf88">XAxiVdma_FrameCounter::ReadDelayTimerCount</a></td></tr>
<tr class="memdesc:ga03ffbe1551620b7f0f72b905006dcf88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay timer threshold for receive.  <a href="#ga03ffbe1551620b7f0f72b905006dcf88">More...</a><br/></td></tr>
<tr class="separator:ga03ffbe1551620b7f0f72b905006dcf88"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab43078f5f7fdd17728ac6ecfb97aea27"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab43078f5f7fdd17728ac6ecfb97aea27">XAxiVdma_FrameCounter::WriteFrameCount</a></td></tr>
<tr class="memdesc:gab43078f5f7fdd17728ac6ecfb97aea27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Interrupt threshold for transmit.  <a href="#gab43078f5f7fdd17728ac6ecfb97aea27">More...</a><br/></td></tr>
<tr class="separator:gab43078f5f7fdd17728ac6ecfb97aea27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad55f207b3d4bfab082a90ea7a43f044c"><td class="memItemLeft" align="right" valign="top">u8&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad55f207b3d4bfab082a90ea7a43f044c">XAxiVdma_FrameCounter::WriteDelayTimerCount</a></td></tr>
<tr class="memdesc:gad55f207b3d4bfab082a90ea7a43f044c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay timer threshold for transmit.  <a href="#gad55f207b3d4bfab082a90ea7a43f044c">More...</a><br/></td></tr>
<tr class="separator:gad55f207b3d4bfab082a90ea7a43f044c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf3e1965613b2d1a437d798e8a37df333"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axivdma.html#ga07f81ffdbceb0024e3a675a787ca3d90">XAxiVdma_CallBack</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf3e1965613b2d1a437d798e8a37df333">XAxiVdma_ChannelCallBack::CompletionCallBack</a></td></tr>
<tr class="memdesc:gaf3e1965613b2d1a437d798e8a37df333"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back for completion intr.  <a href="#gaf3e1965613b2d1a437d798e8a37df333">More...</a><br/></td></tr>
<tr class="separator:gaf3e1965613b2d1a437d798e8a37df333"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43dc909946c675490c5380e7f8f90ede"><td class="memItemLeft" align="right" valign="top">void *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga43dc909946c675490c5380e7f8f90ede">XAxiVdma_ChannelCallBack::CompletionRef</a></td></tr>
<tr class="memdesc:ga43dc909946c675490c5380e7f8f90ede"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back ref.  <a href="#ga43dc909946c675490c5380e7f8f90ede">More...</a><br/></td></tr>
<tr class="separator:ga43dc909946c675490c5380e7f8f90ede"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bde9bc1e0f2871e63eebff6b4d3a11f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__axivdma.html#gaf4cafedb40698ffa21e672bf20ac3602">XAxiVdma_ErrorCallBack</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8bde9bc1e0f2871e63eebff6b4d3a11f">XAxiVdma_ChannelCallBack::ErrCallBack</a></td></tr>
<tr class="memdesc:ga8bde9bc1e0f2871e63eebff6b4d3a11f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back for error intr.  <a href="#ga8bde9bc1e0f2871e63eebff6b4d3a11f">More...</a><br/></td></tr>
<tr class="separator:ga8bde9bc1e0f2871e63eebff6b4d3a11f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa39f1f408770ba9a38f520a0c0df5c48"><td class="memItemLeft" align="right" valign="top">void *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa39f1f408770ba9a38f520a0c0df5c48">XAxiVdma_ChannelCallBack::ErrRef</a></td></tr>
<tr class="memdesc:gaa39f1f408770ba9a38f520a0c0df5c48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back ref.  <a href="#gaa39f1f408770ba9a38f520a0c0df5c48">More...</a><br/></td></tr>
<tr class="separator:gaa39f1f408770ba9a38f520a0c0df5c48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga593206ce099f13c6a62e8c1c95f65b0c"><td class="memItemLeft" align="right" valign="top">UINTPTR&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a></td></tr>
<tr class="memdesc:ga593206ce099f13c6a62e8c1c95f65b0c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory address for this device.  <a href="#ga593206ce099f13c6a62e8c1c95f65b0c">More...</a><br/></td></tr>
<tr class="separator:ga593206ce099f13c6a62e8c1c95f65b0c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad116974229d0e33b61767742f42d9584"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad116974229d0e33b61767742f42d9584">XAxiVdma::HasSG</a></td></tr>
<tr class="memdesc:gad116974229d0e33b61767742f42d9584"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hardware has SG engine.  <a href="#gad116974229d0e33b61767742f42d9584">More...</a><br/></td></tr>
<tr class="separator:gad116974229d0e33b61767742f42d9584"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b4441757224aa73135d6ed334bacdb5"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8b4441757224aa73135d6ed334bacdb5">XAxiVdma::IsReady</a></td></tr>
<tr class="memdesc:ga8b4441757224aa73135d6ed334bacdb5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether driver is initialized.  <a href="#ga8b4441757224aa73135d6ed334bacdb5">More...</a><br/></td></tr>
<tr class="separator:ga8b4441757224aa73135d6ed334bacdb5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5420b0f3823998ce975acbaf1c174b2"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac5420b0f3823998ce975acbaf1c174b2">XAxiVdma::MaxNumFrames</a></td></tr>
<tr class="memdesc:gac5420b0f3823998ce975acbaf1c174b2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of frames to work on.  <a href="#gac5420b0f3823998ce975acbaf1c174b2">More...</a><br/></td></tr>
<tr class="separator:gac5420b0f3823998ce975acbaf1c174b2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac5806353d2211d78f4c963dd7b018ac9"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac5806353d2211d78f4c963dd7b018ac9">XAxiVdma::HasMm2S</a></td></tr>
<tr class="memdesc:gac5806353d2211d78f4c963dd7b018ac9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hw build has read channel.  <a href="#gac5806353d2211d78f4c963dd7b018ac9">More...</a><br/></td></tr>
<tr class="separator:gac5806353d2211d78f4c963dd7b018ac9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1d5c38336cb3bf54211299867efeef2e"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga1d5c38336cb3bf54211299867efeef2e">XAxiVdma::HasMm2SDRE</a></td></tr>
<tr class="memdesc:ga1d5c38336cb3bf54211299867efeef2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether read channel has DRE.  <a href="#ga1d5c38336cb3bf54211299867efeef2e">More...</a><br/></td></tr>
<tr class="separator:ga1d5c38336cb3bf54211299867efeef2e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga22a700bda0eb14878a0c343fbac77456"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga22a700bda0eb14878a0c343fbac77456">XAxiVdma::HasS2Mm</a></td></tr>
<tr class="memdesc:ga22a700bda0eb14878a0c343fbac77456"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether hw build has write channel.  <a href="#ga22a700bda0eb14878a0c343fbac77456">More...</a><br/></td></tr>
<tr class="separator:ga22a700bda0eb14878a0c343fbac77456"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac30944eb3c6ea9b1677f5fb916eb6e19"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac30944eb3c6ea9b1677f5fb916eb6e19">XAxiVdma::HasS2MmDRE</a></td></tr>
<tr class="memdesc:gac30944eb3c6ea9b1677f5fb916eb6e19"><td class="mdescLeft">&#160;</td><td class="mdescRight">Whether write channel has DRE.  <a href="#gac30944eb3c6ea9b1677f5fb916eb6e19">More...</a><br/></td></tr>
<tr class="separator:gac30944eb3c6ea9b1677f5fb916eb6e19"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga64be95b7a55ba43f997c7879ef23a492"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga64be95b7a55ba43f997c7879ef23a492">XAxiVdma::EnableVIDParamRead</a></td></tr>
<tr class="memdesc:ga64be95b7a55ba43f997c7879ef23a492"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Enable for video parameters in direct register mode.  <a href="#ga64be95b7a55ba43f997c7879ef23a492">More...</a><br/></td></tr>
<tr class="separator:ga64be95b7a55ba43f997c7879ef23a492"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2158cdab0215f4079c14741e1af43c5d"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga2158cdab0215f4079c14741e1af43c5d">XAxiVdma::UseFsync</a></td></tr>
<tr class="memdesc:ga2158cdab0215f4079c14741e1af43c5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA operations synchronized to Frame Sync.  <a href="#ga2158cdab0215f4079c14741e1af43c5d">More...</a><br/></td></tr>
<tr class="separator:ga2158cdab0215f4079c14741e1af43c5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3af417807133e29a55867f9c853fa25b"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3af417807133e29a55867f9c853fa25b">XAxiVdma::InternalGenLock</a></td></tr>
<tr class="memdesc:ga3af417807133e29a55867f9c853fa25b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Internal Gen Lock.  <a href="#ga3af417807133e29a55867f9c853fa25b">More...</a><br/></td></tr>
<tr class="separator:ga3af417807133e29a55867f9c853fa25b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2cdde8d751e11e934ecea898574e99a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_vdma___channel_call_back.html">XAxiVdma_ChannelCallBack</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac2cdde8d751e11e934ecea898574e99a">XAxiVdma::ReadCallBack</a></td></tr>
<tr class="memdesc:gac2cdde8d751e11e934ecea898574e99a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back for read channel.  <a href="#gac2cdde8d751e11e934ecea898574e99a">More...</a><br/></td></tr>
<tr class="separator:gac2cdde8d751e11e934ecea898574e99a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae92ec1b3f2075167e0f552a75ecfde46"><td class="memItemLeft" align="right" valign="top"><a class="el" href="struct_x_axi_vdma___channel_call_back.html">XAxiVdma_ChannelCallBack</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae92ec1b3f2075167e0f552a75ecfde46">XAxiVdma::WriteCallBack</a></td></tr>
<tr class="memdesc:gae92ec1b3f2075167e0f552a75ecfde46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Call back for write channel.  <a href="#gae92ec1b3f2075167e0f552a75ecfde46">More...</a><br/></td></tr>
<tr class="separator:gae92ec1b3f2075167e0f552a75ecfde46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1534da961a034f0aa6ea9fee0702e7f0"><td class="memItemLeft" align="right" valign="top">XAxiVdma_Channel&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga1534da961a034f0aa6ea9fee0702e7f0">XAxiVdma::ReadChannel</a></td></tr>
<tr class="memdesc:ga1534da961a034f0aa6ea9fee0702e7f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel to read from memory.  <a href="#ga1534da961a034f0aa6ea9fee0702e7f0">More...</a><br/></td></tr>
<tr class="separator:ga1534da961a034f0aa6ea9fee0702e7f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga606f7921a2a8cf10cfdcf34ee2e82d0a"><td class="memItemLeft" align="right" valign="top">XAxiVdma_Channel&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga606f7921a2a8cf10cfdcf34ee2e82d0a">XAxiVdma::WriteChannel</a></td></tr>
<tr class="memdesc:ga606f7921a2a8cf10cfdcf34ee2e82d0a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel to write to memory.  <a href="#ga606f7921a2a8cf10cfdcf34ee2e82d0a">More...</a><br/></td></tr>
<tr class="separator:ga606f7921a2a8cf10cfdcf34ee2e82d0a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga49f2cc215d38001d678803c690aa6dd5"><td class="memItemLeft" align="right" valign="top">int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga49f2cc215d38001d678803c690aa6dd5">XAxiVdma::AddrWidth</a></td></tr>
<tr class="memdesc:ga49f2cc215d38001d678803c690aa6dd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Address Width.  <a href="#ga49f2cc215d38001d678803c690aa6dd5">More...</a><br/></td></tr>
<tr class="separator:ga49f2cc215d38001d678803c690aa6dd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Buffer Descriptor Alignment</h2></td></tr>
<tr class="memitem:ga6f1b98d0a6280da333bc1a97adea974e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga6f1b98d0a6280da333bc1a97adea974e">XAXIVDMA_BD_MINIMUM_ALIGNMENT</a>&#160;&#160;&#160;0x20</td></tr>
<tr class="memdesc:ga6f1b98d0a6280da333bc1a97adea974e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum byte alignment requirement for descriptors.  <a href="#ga6f1b98d0a6280da333bc1a97adea974e">More...</a><br/></td></tr>
<tr class="separator:ga6f1b98d0a6280da333bc1a97adea974e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0a3a99c4177ed92eda1616fca2fcfb1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad0a3a99c4177ed92eda1616fca2fcfb1">XAXIVDMA_BD_MINIMUM_ALIGNMENT_WD</a>&#160;&#160;&#160;0x8</td></tr>
<tr class="memdesc:gad0a3a99c4177ed92eda1616fca2fcfb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum word alignment requirement for descriptors.  <a href="#gad0a3a99c4177ed92eda1616fca2fcfb1">More...</a><br/></td></tr>
<tr class="separator:gad0a3a99c4177ed92eda1616fca2fcfb1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga74cbf8945ca6cf9175bac9d7ad21a1bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga74cbf8945ca6cf9175bac9d7ad21a1bf">XAXIVDMA_MAX_FRAMESTORE</a>&#160;&#160;&#160;32</td></tr>
<tr class="memdesc:ga74cbf8945ca6cf9175bac9d7ad21a1bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum number of the frame store.  <a href="#ga74cbf8945ca6cf9175bac9d7ad21a1bf">More...</a><br/></td></tr>
<tr class="separator:ga74cbf8945ca6cf9175bac9d7ad21a1bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed6082e7154b873435b6e0cbd6f7bf03"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaed6082e7154b873435b6e0cbd6f7bf03">XAXIVDMA_MAX_FRAMESTORE_64</a>&#160;&#160;&#160;16</td></tr>
<tr class="memdesc:gaed6082e7154b873435b6e0cbd6f7bf03"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum # of the frame store for 64 bit.  <a href="#gaed6082e7154b873435b6e0cbd6f7bf03">More...</a><br/></td></tr>
<tr class="separator:gaed6082e7154b873435b6e0cbd6f7bf03"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Maximum transfer length</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp9719975d4db7edfda8877c2b11b1ec78"></a>This is determined by hardware </p>
</td></tr>
<tr class="memitem:ga675991fc9f37eb104afcd1b6e785a5c3"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga675991fc9f37eb104afcd1b6e785a5c3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_MAX_VSIZE</b>&#160;&#160;&#160;0x1FFF  /* Max vertical size, 8K */</td></tr>
<tr class="separator:ga675991fc9f37eb104afcd1b6e785a5c3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7ca61fa345c760ec0532c209c8cc06bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7ca61fa345c760ec0532c209c8cc06bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_MAX_HSIZE</b>&#160;&#160;&#160;0xFFFF  /* Max horizontal size, 64K */</td></tr>
<tr class="separator:ga7ca61fa345c760ec0532c209c8cc06bd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga243cc3f529218b3edbc954d43cf02c3e"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga243cc3f529218b3edbc954d43cf02c3e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_MAX_STRIDE</b>&#160;&#160;&#160;0xFFFF  /* Max stride size, 64K */</td></tr>
<tr class="separator:ga243cc3f529218b3edbc954d43cf02c3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaecab8ebcc9f83abc6b88289fb11b9440"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaecab8ebcc9f83abc6b88289fb11b9440">XAXIVDMA_FRMDLY_MAX</a>&#160;&#160;&#160;0xF</td></tr>
<tr class="memdesc:gaecab8ebcc9f83abc6b88289fb11b9440"><td class="mdescLeft">&#160;</td><td class="mdescRight">Maximum frame delay.  <a href="#gaecab8ebcc9f83abc6b88289fb11b9440">More...</a><br/></td></tr>
<tr class="separator:gaecab8ebcc9f83abc6b88289fb11b9440"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Device registers</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpe905567f3f1e4630e21d2f8192509576"></a>Register sets on TX (Read) and RX (Write) channels are identical</p>
<p>The version register is shared by both channels </p>
</td></tr>
<tr class="memitem:gae1497f30a25302cb0f4ec93a16a23100"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae1497f30a25302cb0f4ec93a16a23100">XAXIVDMA_TX_OFFSET</a>&#160;&#160;&#160;0x00000000</td></tr>
<tr class="memdesc:gae1497f30a25302cb0f4ec93a16a23100"><td class="mdescLeft">&#160;</td><td class="mdescRight">TX channel registers base.  <a href="#gae1497f30a25302cb0f4ec93a16a23100">More...</a><br/></td></tr>
<tr class="separator:gae1497f30a25302cb0f4ec93a16a23100"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab97c05cd73a22a627177554199efb526"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab97c05cd73a22a627177554199efb526">XAXIVDMA_RX_OFFSET</a>&#160;&#160;&#160;0x00000030</td></tr>
<tr class="memdesc:gab97c05cd73a22a627177554199efb526"><td class="mdescLeft">&#160;</td><td class="mdescRight">RX channel registers base.  <a href="#gab97c05cd73a22a627177554199efb526">More...</a><br/></td></tr>
<tr class="separator:gab97c05cd73a22a627177554199efb526"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga311f4eadce692b10effb8cd492b2120c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga311f4eadce692b10effb8cd492b2120c">XAXIVDMA_PARKPTR_OFFSET</a>&#160;&#160;&#160;0x00000028</td></tr>
<tr class="memdesc:ga311f4eadce692b10effb8cd492b2120c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Park Pointer Register.  <a href="#ga311f4eadce692b10effb8cd492b2120c">More...</a><br/></td></tr>
<tr class="separator:ga311f4eadce692b10effb8cd492b2120c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga727fc3fe53b19cda302295ad25fe71a2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga727fc3fe53b19cda302295ad25fe71a2">XAXIVDMA_VERSION_OFFSET</a>&#160;&#160;&#160;0x0000002C</td></tr>
<tr class="memdesc:ga727fc3fe53b19cda302295ad25fe71a2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Version register.  <a href="#ga727fc3fe53b19cda302295ad25fe71a2">More...</a><br/></td></tr>
<tr class="separator:ga727fc3fe53b19cda302295ad25fe71a2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadb4ad98d2088b8488c6ec4e519449e36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>&#160;&#160;&#160;0x00000000</td></tr>
<tr class="memdesc:gadb4ad98d2088b8488c6ec4e519449e36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Channel control.  <a href="#gadb4ad98d2088b8488c6ec4e519449e36">More...</a><br/></td></tr>
<tr class="separator:gadb4ad98d2088b8488c6ec4e519449e36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0617c0c161fd2d93690e2d3b0a0906b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga0617c0c161fd2d93690e2d3b0a0906b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Status.  <a href="#ga0617c0c161fd2d93690e2d3b0a0906b8">More...</a><br/></td></tr>
<tr class="separator:ga0617c0c161fd2d93690e2d3b0a0906b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga36d711874a8831f2b134a377488aefd2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga36d711874a8831f2b134a377488aefd2">XAXIVDMA_CDESC_OFFSET</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga36d711874a8831f2b134a377488aefd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Current descriptor pointer.  <a href="#ga36d711874a8831f2b134a377488aefd2">More...</a><br/></td></tr>
<tr class="separator:ga36d711874a8831f2b134a377488aefd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8a1e429317226b3d7a3e9ee29688c3ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8a1e429317226b3d7a3e9ee29688c3ab">XAXIVDMA_TDESC_OFFSET</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga8a1e429317226b3d7a3e9ee29688c3ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tail descriptor pointer.  <a href="#ga8a1e429317226b3d7a3e9ee29688c3ab">More...</a><br/></td></tr>
<tr class="separator:ga8a1e429317226b3d7a3e9ee29688c3ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8d67525132073b0a56a57233c9038c8a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8d67525132073b0a56a57233c9038c8a">XAXIVDMA_HI_FRMBUF_OFFSET</a>&#160;&#160;&#160;0x00000014</td></tr>
<tr class="memdesc:ga8d67525132073b0a56a57233c9038c8a"><td class="mdescLeft">&#160;</td><td class="mdescRight">32 FrameBuf Sel  <a href="#ga8d67525132073b0a56a57233c9038c8a">More...</a><br/></td></tr>
<tr class="separator:ga8d67525132073b0a56a57233c9038c8a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacc02fa25db65faceed9fd49ee88fb609"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gacc02fa25db65faceed9fd49ee88fb609">XAXIVDMA_FRMSTORE_OFFSET</a>&#160;&#160;&#160;0x00000018</td></tr>
<tr class="memdesc:gacc02fa25db65faceed9fd49ee88fb609"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame Store.  <a href="#gacc02fa25db65faceed9fd49ee88fb609">More...</a><br/></td></tr>
<tr class="separator:gacc02fa25db65faceed9fd49ee88fb609"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad1bc694180b959ab0794ac6c4468a8ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad1bc694180b959ab0794ac6c4468a8ba">XAXIVDMA_BUFTHRES_OFFSET</a>&#160;&#160;&#160;0x0000001C</td></tr>
<tr class="memdesc:gad1bc694180b959ab0794ac6c4468a8ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Line Buffer Thres.  <a href="#gad1bc694180b959ab0794ac6c4468a8ba">More...</a><br/></td></tr>
<tr class="separator:gad1bc694180b959ab0794ac6c4468a8ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6d94757e1f4835c0975b13f0ab543f8b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga6d94757e1f4835c0975b13f0ab543f8b">XAXIVDMA_MM2S_ADDR_OFFSET</a>&#160;&#160;&#160;0x00000050</td></tr>
<tr class="memdesc:ga6d94757e1f4835c0975b13f0ab543f8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">MM2S channel Addr.  <a href="#ga6d94757e1f4835c0975b13f0ab543f8b">More...</a><br/></td></tr>
<tr class="separator:ga6d94757e1f4835c0975b13f0ab543f8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8daae8241a3aeae54627939188febf71"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8daae8241a3aeae54627939188febf71">XAXIVDMA_S2MM_ADDR_OFFSET</a>&#160;&#160;&#160;0x000000A0</td></tr>
<tr class="memdesc:ga8daae8241a3aeae54627939188febf71"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM channel Addr.  <a href="#ga8daae8241a3aeae54627939188febf71">More...</a><br/></td></tr>
<tr class="separator:ga8daae8241a3aeae54627939188febf71"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2ab424fdb1d7af6bbc66d02193c511ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga2ab424fdb1d7af6bbc66d02193c511ab">XAXIVDMA_VFLIP_OFFSET</a>&#160;&#160;&#160;0x000000EC</td></tr>
<tr class="memdesc:ga2ab424fdb1d7af6bbc66d02193c511ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable Vertical Flip Register.  <a href="#ga2ab424fdb1d7af6bbc66d02193c511ab">More...</a><br/></td></tr>
<tr class="separator:ga2ab424fdb1d7af6bbc66d02193c511ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3281565e12c47c4888e228ec6a59e3c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae3281565e12c47c4888e228ec6a59e3c">XAXIVDMA_S2MM_DMA_IRQ_MASK_OFFSET</a>&#160;&#160;&#160;0x0000003C</td></tr>
<tr class="memdesc:gae3281565e12c47c4888e228ec6a59e3c"><td class="mdescLeft">&#160;</td><td class="mdescRight">S2MM Err IRQ Mask.  <a href="#gae3281565e12c47c4888e228ec6a59e3c">More...</a><br/></td></tr>
<tr class="separator:gae3281565e12c47c4888e228ec6a59e3c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Start Addresses Register Array for a Channel</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp991b0802eab5be0097a0fb1aa8fb4077"></a>Base offset is set in each channel This set of registers are write only, they can be read when C_ENABLE_VIDPRMTR_READS is 1. </p>
</td></tr>
<tr class="memitem:ga4feada9ad41cf079a8c9b7c6aebfecff"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga4feada9ad41cf079a8c9b7c6aebfecff">XAXIVDMA_VSIZE_OFFSET</a>&#160;&#160;&#160;0x00000000</td></tr>
<tr class="memdesc:ga4feada9ad41cf079a8c9b7c6aebfecff"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical size.  <a href="#ga4feada9ad41cf079a8c9b7c6aebfecff">More...</a><br/></td></tr>
<tr class="separator:ga4feada9ad41cf079a8c9b7c6aebfecff"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa1752ade8b38bc29a8528859e634a38d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa1752ade8b38bc29a8528859e634a38d">XAXIVDMA_HSIZE_OFFSET</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gaa1752ade8b38bc29a8528859e634a38d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal size.  <a href="#gaa1752ade8b38bc29a8528859e634a38d">More...</a><br/></td></tr>
<tr class="separator:gaa1752ade8b38bc29a8528859e634a38d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e165469c0c5618932b44f17dcfa566b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga5e165469c0c5618932b44f17dcfa566b">XAXIVDMA_STRD_FRMDLY_OFFSET</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga5e165469c0c5618932b44f17dcfa566b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal size.  <a href="#ga5e165469c0c5618932b44f17dcfa566b">More...</a><br/></td></tr>
<tr class="separator:ga5e165469c0c5618932b44f17dcfa566b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73ce4a1f2caf365b8c54cd77827a29cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga73ce4a1f2caf365b8c54cd77827a29cc">XAXIVDMA_START_ADDR_OFFSET</a>&#160;&#160;&#160;0x0000000C</td></tr>
<tr class="memdesc:ga73ce4a1f2caf365b8c54cd77827a29cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start of address.  <a href="#ga73ce4a1f2caf365b8c54cd77827a29cc">More...</a><br/></td></tr>
<tr class="separator:ga73ce4a1f2caf365b8c54cd77827a29cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaba552b4bc0c96fb9d76ef37e9fc34da7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaba552b4bc0c96fb9d76ef37e9fc34da7">XAXIVDMA_START_ADDR_LEN</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gaba552b4bc0c96fb9d76ef37e9fc34da7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Each entry is 4 bytes.  <a href="#gaba552b4bc0c96fb9d76ef37e9fc34da7">More...</a><br/></td></tr>
<tr class="separator:gaba552b4bc0c96fb9d76ef37e9fc34da7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga83c97295f4a50d39cacbb32fa928ea95"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga83c97295f4a50d39cacbb32fa928ea95">XAXIVDMA_START_ADDR_MSB_OFFSET</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga83c97295f4a50d39cacbb32fa928ea95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start of address.  <a href="#ga83c97295f4a50d39cacbb32fa928ea95">More...</a><br/></td></tr>
<tr class="separator:ga83c97295f4a50d39cacbb32fa928ea95"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Bitmasks of the XAXIVDMA_CR_OFFSET register</h2></td></tr>
<tr class="memitem:gaf6165b2a5668ffbfe3320c83f1a3ffaa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf6165b2a5668ffbfe3320c83f1a3ffaa">XAXIVDMA_CR_RUNSTOP_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:gaf6165b2a5668ffbfe3320c83f1a3ffaa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start/stop DMA channel.  <a href="#gaf6165b2a5668ffbfe3320c83f1a3ffaa">More...</a><br/></td></tr>
<tr class="separator:gaf6165b2a5668ffbfe3320c83f1a3ffaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6bda812084d25429b793e441c698298d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga6bda812084d25429b793e441c698298d">XAXIVDMA_CR_TAIL_EN_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga6bda812084d25429b793e441c698298d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Tail ptr enable or Park.  <a href="#ga6bda812084d25429b793e441c698298d">More...</a><br/></td></tr>
<tr class="separator:ga6bda812084d25429b793e441c698298d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaacbafb1fba1bc73bd5ed95b06a5cb4f5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaacbafb1fba1bc73bd5ed95b06a5cb4f5">XAXIVDMA_CR_RESET_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:gaacbafb1fba1bc73bd5ed95b06a5cb4f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset channel.  <a href="#gaacbafb1fba1bc73bd5ed95b06a5cb4f5">More...</a><br/></td></tr>
<tr class="separator:gaacbafb1fba1bc73bd5ed95b06a5cb4f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac70dd163b5142c5211e349e16f980e11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac70dd163b5142c5211e349e16f980e11">XAXIVDMA_CR_SYNC_EN_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:gac70dd163b5142c5211e349e16f980e11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gen-lock enable.  <a href="#gac70dd163b5142c5211e349e16f980e11">More...</a><br/></td></tr>
<tr class="separator:gac70dd163b5142c5211e349e16f980e11"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabfed305b44e791eaae8142ab94bd0ba9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gabfed305b44e791eaae8142ab94bd0ba9">XAXIVDMA_CR_FRMCNT_EN_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:gabfed305b44e791eaae8142ab94bd0ba9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame count enable.  <a href="#gabfed305b44e791eaae8142ab94bd0ba9">More...</a><br/></td></tr>
<tr class="separator:gabfed305b44e791eaae8142ab94bd0ba9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7af6342cb5f43fa2036b3fbc8be1a082"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7af6342cb5f43fa2036b3fbc8be1a082">XAXIVDMA_CR_FSYNC_SRC_MASK</a>&#160;&#160;&#160;0x00000060</td></tr>
<tr class="memdesc:ga7af6342cb5f43fa2036b3fbc8be1a082"><td class="mdescLeft">&#160;</td><td class="mdescRight">Fsync Source Select.  <a href="#ga7af6342cb5f43fa2036b3fbc8be1a082">More...</a><br/></td></tr>
<tr class="separator:ga7af6342cb5f43fa2036b3fbc8be1a082"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac2bf28150cc3fc0d8cd0fceeedf60554"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac2bf28150cc3fc0d8cd0fceeedf60554">XAXIVDMA_CR_GENLCK_SRC_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:gac2bf28150cc3fc0d8cd0fceeedf60554"><td class="mdescLeft">&#160;</td><td class="mdescRight">Genlock Source Select.  <a href="#gac2bf28150cc3fc0d8cd0fceeedf60554">More...</a><br/></td></tr>
<tr class="separator:gac2bf28150cc3fc0d8cd0fceeedf60554"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa5247e7518945ca4123cff1a2f2d8476"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa5247e7518945ca4123cff1a2f2d8476">XAXIVDMA_CR_RD_PTR_MASK</a>&#160;&#160;&#160;0x00000F00</td></tr>
<tr class="memdesc:gaa5247e7518945ca4123cff1a2f2d8476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read pointer number.  <a href="#gaa5247e7518945ca4123cff1a2f2d8476">More...</a><br/></td></tr>
<tr class="separator:gaa5247e7518945ca4123cff1a2f2d8476"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga627a79cc1c66dfbd98783d7f053fdd36"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga627a79cc1c66dfbd98783d7f053fdd36">XAXIVDMA_CR_GENLCK_RPT_MASK</a>&#160;&#160;&#160;0x00008000</td></tr>
<tr class="memdesc:ga627a79cc1c66dfbd98783d7f053fdd36"><td class="mdescLeft">&#160;</td><td class="mdescRight">GenLock Repeat.  <a href="#ga627a79cc1c66dfbd98783d7f053fdd36">More...</a><br/></td></tr>
<tr class="separator:ga627a79cc1c66dfbd98783d7f053fdd36"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga950309f30a54347e542bdfd2edff187c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga950309f30a54347e542bdfd2edff187c">XAXIVDMA_VFLIP_EN_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga950309f30a54347e542bdfd2edff187c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical flip enable.  <a href="#ga950309f30a54347e542bdfd2edff187c">More...</a><br/></td></tr>
<tr class="separator:ga950309f30a54347e542bdfd2edff187c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe377bb760c2aa781930960549690b87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gafe377bb760c2aa781930960549690b87">XAXIVDMA_CR_RD_PTR_SHIFT</a>&#160;&#160;&#160;8</td></tr>
<tr class="memdesc:gafe377bb760c2aa781930960549690b87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for read pointer number.  <a href="#gafe377bb760c2aa781930960549690b87">More...</a><br/></td></tr>
<tr class="separator:gafe377bb760c2aa781930960549690b87"><td class="memSeparator" colspan="2">&#160;</td></tr>
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<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Bitmasks of the XAXIVDMA_SR_OFFSET register</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrpba29e4f32ff3a037eb53773b03d8f1bb"></a>This register reports status of a DMA channel, including run/stop/idle state, errors, and interrupts </p>
</td></tr>
<tr class="memitem:ga950f0fc166fb91f145538984a3b3f29f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga950f0fc166fb91f145538984a3b3f29f">XAXIVDMA_SR_HALTED_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga950f0fc166fb91f145538984a3b3f29f"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA channel halted.  <a href="#ga950f0fc166fb91f145538984a3b3f29f">More...</a><br/></td></tr>
<tr class="separator:ga950f0fc166fb91f145538984a3b3f29f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad3ebc688ce8c9515277296cd7c9d9d68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad3ebc688ce8c9515277296cd7c9d9d68">XAXIVDMA_SR_IDLE_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:gad3ebc688ce8c9515277296cd7c9d9d68"><td class="mdescLeft">&#160;</td><td class="mdescRight">DMA channel idle.  <a href="#gad3ebc688ce8c9515277296cd7c9d9d68">More...</a><br/></td></tr>
<tr class="separator:gad3ebc688ce8c9515277296cd7c9d9d68"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga73f14cc8e7e2905ed537d3848b31c23b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga73f14cc8e7e2905ed537d3848b31c23b">XAXIVDMA_SR_ERR_INTERNAL_MASK</a>&#160;&#160;&#160;0x00000010</td></tr>
<tr class="memdesc:ga73f14cc8e7e2905ed537d3848b31c23b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Datamover internal err.  <a href="#ga73f14cc8e7e2905ed537d3848b31c23b">More...</a><br/></td></tr>
<tr class="separator:ga73f14cc8e7e2905ed537d3848b31c23b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga08d366ceff80640f727d34668680f7a0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga08d366ceff80640f727d34668680f7a0">XAXIVDMA_SR_ERR_SLAVE_MASK</a>&#160;&#160;&#160;0x00000020</td></tr>
<tr class="memdesc:ga08d366ceff80640f727d34668680f7a0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Datamover slave err.  <a href="#ga08d366ceff80640f727d34668680f7a0">More...</a><br/></td></tr>
<tr class="separator:ga08d366ceff80640f727d34668680f7a0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaafc34ba20bfb44a6132fb677b4a28d9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaafc34ba20bfb44a6132fb677b4a28d9d">XAXIVDMA_SR_ERR_DECODE_MASK</a>&#160;&#160;&#160;0x00000040</td></tr>
<tr class="memdesc:gaafc34ba20bfb44a6132fb677b4a28d9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Datamover decode err.  <a href="#gaafc34ba20bfb44a6132fb677b4a28d9d">More...</a><br/></td></tr>
<tr class="separator:gaafc34ba20bfb44a6132fb677b4a28d9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e70b134baebf4f1a124700d8601325b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga5e70b134baebf4f1a124700d8601325b">XAXIVDMA_SR_ERR_FSZ_LESS_MASK</a>&#160;&#160;&#160;0x00000080</td></tr>
<tr class="memdesc:ga5e70b134baebf4f1a124700d8601325b"><td class="mdescLeft">&#160;</td><td class="mdescRight">FSize Less Mismatch err.  <a href="#ga5e70b134baebf4f1a124700d8601325b">More...</a><br/></td></tr>
<tr class="separator:ga5e70b134baebf4f1a124700d8601325b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8b94d44f1347a7c92370f63855015ba4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8b94d44f1347a7c92370f63855015ba4">XAXIVDMA_SR_ERR_LSZ_LESS_MASK</a>&#160;&#160;&#160;0x00000100</td></tr>
<tr class="memdesc:ga8b94d44f1347a7c92370f63855015ba4"><td class="mdescLeft">&#160;</td><td class="mdescRight">LSize Less Mismatch err.  <a href="#ga8b94d44f1347a7c92370f63855015ba4">More...</a><br/></td></tr>
<tr class="separator:ga8b94d44f1347a7c92370f63855015ba4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga30c9fca88a18c4bcde79ddf03cd6d240"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga30c9fca88a18c4bcde79ddf03cd6d240">XAXIVDMA_SR_ERR_SG_SLV_MASK</a>&#160;&#160;&#160;0x00000200</td></tr>
<tr class="memdesc:ga30c9fca88a18c4bcde79ddf03cd6d240"><td class="mdescLeft">&#160;</td><td class="mdescRight">SG slave err.  <a href="#ga30c9fca88a18c4bcde79ddf03cd6d240">More...</a><br/></td></tr>
<tr class="separator:ga30c9fca88a18c4bcde79ddf03cd6d240"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga228552801c02459e8941f66b55aee2fe"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga228552801c02459e8941f66b55aee2fe">XAXIVDMA_SR_ERR_SG_DEC_MASK</a>&#160;&#160;&#160;0x00000400</td></tr>
<tr class="memdesc:ga228552801c02459e8941f66b55aee2fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">SG decode err.  <a href="#ga228552801c02459e8941f66b55aee2fe">More...</a><br/></td></tr>
<tr class="separator:ga228552801c02459e8941f66b55aee2fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27f1501ec6a048b6afa3e66720d971e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga27f1501ec6a048b6afa3e66720d971e3">XAXIVDMA_SR_ERR_FSZ_MORE_MASK</a>&#160;&#160;&#160;0x00000800</td></tr>
<tr class="memdesc:ga27f1501ec6a048b6afa3e66720d971e3"><td class="mdescLeft">&#160;</td><td class="mdescRight">FSize More Mismatch err.  <a href="#ga27f1501ec6a048b6afa3e66720d971e3">More...</a><br/></td></tr>
<tr class="separator:ga27f1501ec6a048b6afa3e66720d971e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9fe7dc9348c9a4aed7eb2f671e62dda7"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga9fe7dc9348c9a4aed7eb2f671e62dda7">XAXIVDMA_SR_ERR_ALL_MASK</a>&#160;&#160;&#160;0x00000FF0</td></tr>
<tr class="memdesc:ga9fe7dc9348c9a4aed7eb2f671e62dda7"><td class="mdescLeft">&#160;</td><td class="mdescRight">All errors.  <a href="#ga9fe7dc9348c9a4aed7eb2f671e62dda7">More...</a><br/></td></tr>
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Bitmask for interrupts</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp02a1bad3c75458826a49ba879f761eee"></a>These masks are shared by the XAXIVDMA_CR_OFFSET register and the XAXIVDMA_SR_OFFSET register </p>
</td></tr>
<tr class="memitem:ga2f25fa1f54f8b95752ba1d303fc4a6b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga2f25fa1f54f8b95752ba1d303fc4a6b6">XAXIVDMA_IXR_FRMCNT_MASK</a>&#160;&#160;&#160;0x00001000</td></tr>
<tr class="memdesc:ga2f25fa1f54f8b95752ba1d303fc4a6b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame count intr.  <a href="#ga2f25fa1f54f8b95752ba1d303fc4a6b6">More...</a><br/></td></tr>
<tr class="separator:ga2f25fa1f54f8b95752ba1d303fc4a6b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad12fc5d30ab28f345d19e4034aea746e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad12fc5d30ab28f345d19e4034aea746e">XAXIVDMA_IXR_DELAYCNT_MASK</a>&#160;&#160;&#160;0x00002000</td></tr>
<tr class="memdesc:gad12fc5d30ab28f345d19e4034aea746e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay interrupt.  <a href="#gad12fc5d30ab28f345d19e4034aea746e">More...</a><br/></td></tr>
<tr class="separator:gad12fc5d30ab28f345d19e4034aea746e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga88ccc9e37f16a1b4ecffd5e09a4c8cfb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga88ccc9e37f16a1b4ecffd5e09a4c8cfb">XAXIVDMA_IXR_ERROR_MASK</a>&#160;&#160;&#160;0x00004000</td></tr>
<tr class="memdesc:ga88ccc9e37f16a1b4ecffd5e09a4c8cfb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Error interrupt.  <a href="#ga88ccc9e37f16a1b4ecffd5e09a4c8cfb">More...</a><br/></td></tr>
<tr class="separator:ga88ccc9e37f16a1b4ecffd5e09a4c8cfb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaed70612ee26f1faf7699e301afda8048"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaed70612ee26f1faf7699e301afda8048">XAXIVDMA_IXR_COMPLETION_MASK</a>&#160;&#160;&#160;0x00003000</td></tr>
<tr class="memdesc:gaed70612ee26f1faf7699e301afda8048"><td class="mdescLeft">&#160;</td><td class="mdescRight">Completion interrupts.  <a href="#gaed70612ee26f1faf7699e301afda8048">More...</a><br/></td></tr>
<tr class="separator:gaed70612ee26f1faf7699e301afda8048"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6e80967b83e9f0f65dfde6c92008f0d2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>&#160;&#160;&#160;0x00007000</td></tr>
<tr class="memdesc:ga6e80967b83e9f0f65dfde6c92008f0d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">All interrupts.  <a href="#ga6e80967b83e9f0f65dfde6c92008f0d2">More...</a><br/></td></tr>
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Bitmask and shift for delay and coalesce</h2></td></tr>
<tr><td class="ititle" colspan="2"><p><a class="anchor" id="amgrp7d080d6a9fae95527adc10fd14697fe7"></a>These masks are shared by the XAXIVDMA_CR_OFFSET register and the XAXIVDMA_SR_OFFSET register </p>
</td></tr>
<tr class="memitem:gac556991d9307f211f770d15a117ee937"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac556991d9307f211f770d15a117ee937">XAXIVDMA_DELAY_MASK</a>&#160;&#160;&#160;0xFF000000</td></tr>
<tr class="memdesc:gac556991d9307f211f770d15a117ee937"><td class="mdescLeft">&#160;</td><td class="mdescRight">Delay timeout counter.  <a href="#gac556991d9307f211f770d15a117ee937">More...</a><br/></td></tr>
<tr class="separator:gac556991d9307f211f770d15a117ee937"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf4ab4ba9a0c2984efad7fefe195fe0ed"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf4ab4ba9a0c2984efad7fefe195fe0ed">XAXIVDMA_FRMCNT_MASK</a>&#160;&#160;&#160;0x00FF0000</td></tr>
<tr class="memdesc:gaf4ab4ba9a0c2984efad7fefe195fe0ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame counter.  <a href="#gaf4ab4ba9a0c2984efad7fefe195fe0ed">More...</a><br/></td></tr>
<tr class="separator:gaf4ab4ba9a0c2984efad7fefe195fe0ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad0d12f32fff3037d4b1316350e02fef6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gad0d12f32fff3037d4b1316350e02fef6">XAXIVDMA_REGINDEX_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:gad0d12f32fff3037d4b1316350e02fef6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Register Index.  <a href="#gad0d12f32fff3037d4b1316350e02fef6">More...</a><br/></td></tr>
<tr class="separator:gad0d12f32fff3037d4b1316350e02fef6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadbbf73e481e88de57b05b66a7b2953be"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gadbbf73e481e88de57b05b66a7b2953be"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_DELAY_SHIFT</b>&#160;&#160;&#160;24</td></tr>
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<tr class="memitem:gaa1327862b7b357444edd2fb689247f06"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaa1327862b7b357444edd2fb689247f06"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_FRMCNT_SHIFT</b>&#160;&#160;&#160;16</td></tr>
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Bitmask for the XAXIVDMA_CDESC_OFFSET register</h2></td></tr>
<tr class="memitem:gac6d688599e8a9ffdf9c45bd7789f58cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac6d688599e8a9ffdf9c45bd7789f58cc">XAXIVDMA_CDESC_CURBD_MASK</a>&#160;&#160;&#160;0xFFFFFFE0</td></tr>
<tr class="memdesc:gac6d688599e8a9ffdf9c45bd7789f58cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">BD now working on.  <a href="#gac6d688599e8a9ffdf9c45bd7789f58cc">More...</a><br/></td></tr>
<tr class="separator:gac6d688599e8a9ffdf9c45bd7789f58cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmask for XAXIVDMA_TDESC_OFFSET register</h2></td></tr>
<tr class="memitem:gaa47b0fa02c5e8f984bc17bf18cd379ce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaa47b0fa02c5e8f984bc17bf18cd379ce">XAXIVDMA_TDESC_CURBD_MASK</a>&#160;&#160;&#160;0xFFFFFFE0</td></tr>
<tr class="memdesc:gaa47b0fa02c5e8f984bc17bf18cd379ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">BD to stop on.  <a href="#gaa47b0fa02c5e8f984bc17bf18cd379ce">More...</a><br/></td></tr>
<tr class="separator:gaa47b0fa02c5e8f984bc17bf18cd379ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
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Bitmask for XAXIVDMA_FRMSTORE_OFFSET register</h2></td></tr>
<tr class="memitem:ga8391dd8e6cc064bdc591d311b25b0c3c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga8391dd8e6cc064bdc591d311b25b0c3c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_FRMSTORE_MASK</b>&#160;&#160;&#160;0x0000003F</td></tr>
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Bitmask for XAXIVDMA_PARKPTR_OFFSET register</h2></td></tr>
<tr class="memitem:ga39001a9b8ae972fc53463961ca423ac1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga39001a9b8ae972fc53463961ca423ac1">XAXIVDMA_PARKPTR_READREF_MASK</a>&#160;&#160;&#160;0x0000001F</td></tr>
<tr class="memdesc:ga39001a9b8ae972fc53463961ca423ac1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read frame to park on.  <a href="#ga39001a9b8ae972fc53463961ca423ac1">More...</a><br/></td></tr>
<tr class="separator:ga39001a9b8ae972fc53463961ca423ac1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9656852c690e3a7e5253fe67b87f10cf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga9656852c690e3a7e5253fe67b87f10cf">XAXIVDMA_PARKPTR_WRTREF_MASK</a>&#160;&#160;&#160;0x00001F00</td></tr>
<tr class="memdesc:ga9656852c690e3a7e5253fe67b87f10cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Write frame to park on.  <a href="#ga9656852c690e3a7e5253fe67b87f10cf">More...</a><br/></td></tr>
<tr class="separator:ga9656852c690e3a7e5253fe67b87f10cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3326b79c706c90993eea1033edc5f304"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3326b79c706c90993eea1033edc5f304">XAXIVDMA_PARKPTR_READSTR_MASK</a>&#160;&#160;&#160;0x001F0000</td></tr>
<tr class="memdesc:ga3326b79c706c90993eea1033edc5f304"><td class="mdescLeft">&#160;</td><td class="mdescRight">Current read frame.  <a href="#ga3326b79c706c90993eea1033edc5f304">More...</a><br/></td></tr>
<tr class="separator:ga3326b79c706c90993eea1033edc5f304"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafdf5ab4a765d1ed93a697b276d832b7d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gafdf5ab4a765d1ed93a697b276d832b7d">XAXIVDMA_PARKPTR_WRTSTR_MASK</a>&#160;&#160;&#160;0x1F000000</td></tr>
<tr class="memdesc:gafdf5ab4a765d1ed93a697b276d832b7d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Current write frame.  <a href="#gafdf5ab4a765d1ed93a697b276d832b7d">More...</a><br/></td></tr>
<tr class="separator:gafdf5ab4a765d1ed93a697b276d832b7d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0e834922f62a7d5d10e10936acf42b7c"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga0e834922f62a7d5d10e10936acf42b7c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_READREF_SHIFT</b>&#160;&#160;&#160;0</td></tr>
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<tr class="memitem:gaf8a3db8b7c54d3a33cf2856d04e8d3bd"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="gaf8a3db8b7c54d3a33cf2856d04e8d3bd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_WRTREF_SHIFT</b>&#160;&#160;&#160;8</td></tr>
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<tr class="memitem:ga5bcf9c65743d7dddf7025d7f2eeb2d70"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga5bcf9c65743d7dddf7025d7f2eeb2d70"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_READSTR_SHIFT</b>&#160;&#160;&#160;16</td></tr>
<tr class="separator:ga5bcf9c65743d7dddf7025d7f2eeb2d70"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga76a20e94c018639a564b71ec3c34dbe7"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga76a20e94c018639a564b71ec3c34dbe7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_WRTSTR_SHIFT</b>&#160;&#160;&#160;24</td></tr>
<tr class="separator:ga76a20e94c018639a564b71ec3c34dbe7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7e274c9f02af4538043f757c3e224a91"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga7e274c9f02af4538043f757c3e224a91">XAXIVDMA_FRM_MAX</a>&#160;&#160;&#160;0xF</td></tr>
<tr class="memdesc:ga7e274c9f02af4538043f757c3e224a91"><td class="mdescLeft">&#160;</td><td class="mdescRight">At most 16 frames.  <a href="#ga7e274c9f02af4538043f757c3e224a91">More...</a><br/></td></tr>
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Bitmask for XAXIVDMA_VERSION_OFFSET register</h2></td></tr>
<tr class="memitem:ga778f82c0f80720c8114b09dd840dd625"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga778f82c0f80720c8114b09dd840dd625">XAXIVDMA_VERSION_MAJOR_MASK</a>&#160;&#160;&#160;0xF0000000</td></tr>
<tr class="memdesc:ga778f82c0f80720c8114b09dd840dd625"><td class="mdescLeft">&#160;</td><td class="mdescRight">Major version.  <a href="#ga778f82c0f80720c8114b09dd840dd625">More...</a><br/></td></tr>
<tr class="separator:ga778f82c0f80720c8114b09dd840dd625"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5d2a6902e976af18d7486fe12d45ba9b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga5d2a6902e976af18d7486fe12d45ba9b">XAXIVDMA_VERSION_MINOR_MASK</a>&#160;&#160;&#160;0x0FF00000</td></tr>
<tr class="memdesc:ga5d2a6902e976af18d7486fe12d45ba9b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minor version.  <a href="#ga5d2a6902e976af18d7486fe12d45ba9b">More...</a><br/></td></tr>
<tr class="separator:ga5d2a6902e976af18d7486fe12d45ba9b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae651c29e871bbdd802cecc9fb45948b3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae651c29e871bbdd802cecc9fb45948b3">XAXIVDMA_VERSION_REV_MASK</a>&#160;&#160;&#160;0x000F0000</td></tr>
<tr class="memdesc:gae651c29e871bbdd802cecc9fb45948b3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Revision letter.  <a href="#gae651c29e871bbdd802cecc9fb45948b3">More...</a><br/></td></tr>
<tr class="separator:gae651c29e871bbdd802cecc9fb45948b3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7394eb6e7fe9e801acb30d4d776e7062"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7394eb6e7fe9e801acb30d4d776e7062"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_VERSION_MAJOR_SHIFT</b>&#160;&#160;&#160;28</td></tr>
<tr class="separator:ga7394eb6e7fe9e801acb30d4d776e7062"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7250fc83efc10927472e1dadf80295ea"><td class="memItemLeft" align="right" valign="top"><a class="anchor" id="ga7250fc83efc10927472e1dadf80295ea"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>XAXIVDMA_VERSION_MINOR_SHIFT</b>&#160;&#160;&#160;20</td></tr>
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Bitmask for XAXIVDMA_S2MM_IRQ_MASK_OFFSET register</h2></td></tr>
<tr class="memitem:ga35e5cf93415d4b0f1973af8fca40bec6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga35e5cf93415d4b0f1973af8fca40bec6">XAXIVDMA_S2MM_IRQ_FSZLESS_SOF_ERLY_MASK</a>&#160;&#160;&#160;0x00000001</td></tr>
<tr class="memdesc:ga35e5cf93415d4b0f1973af8fca40bec6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks S2MM IRQ FSize Less/SOF Early Error.  <a href="#ga35e5cf93415d4b0f1973af8fca40bec6">More...</a><br/></td></tr>
<tr class="separator:ga35e5cf93415d4b0f1973af8fca40bec6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60eb583a54045686ff42ea1e93fd67dd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga60eb583a54045686ff42ea1e93fd67dd">XAXIVDMA_S2MM_IRQ_LSZLESS_EOL_ERLY_MASK</a>&#160;&#160;&#160;0x00000002</td></tr>
<tr class="memdesc:ga60eb583a54045686ff42ea1e93fd67dd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks S2MM IRQ LSize Less/EOL Early Error.  <a href="#ga60eb583a54045686ff42ea1e93fd67dd">More...</a><br/></td></tr>
<tr class="separator:ga60eb583a54045686ff42ea1e93fd67dd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga19f83bb8bcb2f6535463bcd03f39552e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga19f83bb8bcb2f6535463bcd03f39552e">XAXIVDMA_S2MM_IRQ_FSZMORE_SOF_LATE_MASK</a>&#160;&#160;&#160;0x00000004</td></tr>
<tr class="memdesc:ga19f83bb8bcb2f6535463bcd03f39552e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks S2MM IRQ FSize More/SOF Late Error.  <a href="#ga19f83bb8bcb2f6535463bcd03f39552e">More...</a><br/></td></tr>
<tr class="separator:ga19f83bb8bcb2f6535463bcd03f39552e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0deb90d1e246708ed32ed905d56894e9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0deb90d1e246708ed32ed905d56894e9">XAXIVDMA_S2MM_IRQ_LSZMORE_EOL_LATE_MASK</a>&#160;&#160;&#160;0x00000008</td></tr>
<tr class="memdesc:ga0deb90d1e246708ed32ed905d56894e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks S2MM IRQ LSize More/EOL Late Error.  <a href="#ga0deb90d1e246708ed32ed905d56894e9">More...</a><br/></td></tr>
<tr class="separator:ga0deb90d1e246708ed32ed905d56894e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0ba0af99c40314b1288a6a95ba2ee688"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga0ba0af99c40314b1288a6a95ba2ee688">XAXIVDMA_S2MM_IRQ_ERR_ALL_MASK</a>&#160;&#160;&#160;0x0000000F</td></tr>
<tr class="memdesc:ga0ba0af99c40314b1288a6a95ba2ee688"><td class="mdescLeft">&#160;</td><td class="mdescRight">Masks all S2MM IRQ Errors.  <a href="#ga0ba0af99c40314b1288a6a95ba2ee688">More...</a><br/></td></tr>
<tr class="separator:ga0ba0af99c40314b1288a6a95ba2ee688"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Frame Delay shared by start address registers and BDs</h2></td></tr>
<tr class="memitem:ga8394a54d3cfaf11b3b824059d760d5d8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga8394a54d3cfaf11b3b824059d760d5d8">XAXIVDMA_VSIZE_MASK</a>&#160;&#160;&#160;0x00001FFF</td></tr>
<tr class="memdesc:ga8394a54d3cfaf11b3b824059d760d5d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical size.  <a href="#ga8394a54d3cfaf11b3b824059d760d5d8">More...</a><br/></td></tr>
<tr class="separator:ga8394a54d3cfaf11b3b824059d760d5d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3fbf84b20d6e4639e658a99c03a300b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga3fbf84b20d6e4639e658a99c03a300b6">XAXIVDMA_HSIZE_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:ga3fbf84b20d6e4639e658a99c03a300b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal size.  <a href="#ga3fbf84b20d6e4639e658a99c03a300b6">More...</a><br/></td></tr>
<tr class="separator:ga3fbf84b20d6e4639e658a99c03a300b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac73189f5e640fc37597a0559e67e7dce"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gac73189f5e640fc37597a0559e67e7dce">XAXIVDMA_STRIDE_MASK</a>&#160;&#160;&#160;0x0000FFFF</td></tr>
<tr class="memdesc:gac73189f5e640fc37597a0559e67e7dce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stride size.  <a href="#gac73189f5e640fc37597a0559e67e7dce">More...</a><br/></td></tr>
<tr class="separator:gac73189f5e640fc37597a0559e67e7dce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga76abb6dc712998f6165b074dccc4670e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga76abb6dc712998f6165b074dccc4670e">XAXIVDMA_FRMDLY_MASK</a>&#160;&#160;&#160;0x0F000000</td></tr>
<tr class="memdesc:ga76abb6dc712998f6165b074dccc4670e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frame delay.  <a href="#ga76abb6dc712998f6165b074dccc4670e">More...</a><br/></td></tr>
<tr class="separator:ga76abb6dc712998f6165b074dccc4670e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga266367de39275d3e11a96966a4039130"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga266367de39275d3e11a96966a4039130">XAXIVDMA_FRMDLY_SHIFT</a>&#160;&#160;&#160;24</td></tr>
<tr class="memdesc:ga266367de39275d3e11a96966a4039130"><td class="mdescLeft">&#160;</td><td class="mdescRight">Shift for frame delay.  <a href="#ga266367de39275d3e11a96966a4039130">More...</a><br/></td></tr>
<tr class="separator:ga266367de39275d3e11a96966a4039130"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="member-group"></a>
Buffer Descriptor offsets</h2></td></tr>
<tr class="memitem:gaf78dbbcc98154cea4b2447f6c84bc3f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf78dbbcc98154cea4b2447f6c84bc3f4">XAXIVDMA_BD_NDESC_OFFSET</a>&#160;&#160;&#160;0x00</td></tr>
<tr class="memdesc:gaf78dbbcc98154cea4b2447f6c84bc3f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Next descriptor pointer.  <a href="#gaf78dbbcc98154cea4b2447f6c84bc3f4">More...</a><br/></td></tr>
<tr class="separator:gaf78dbbcc98154cea4b2447f6c84bc3f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga304b699c1cacbc7fe6f13b3c8f1e2b2f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga304b699c1cacbc7fe6f13b3c8f1e2b2f">XAXIVDMA_BD_START_ADDR_OFFSET</a>&#160;&#160;&#160;0x08</td></tr>
<tr class="memdesc:ga304b699c1cacbc7fe6f13b3c8f1e2b2f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Start address.  <a href="#ga304b699c1cacbc7fe6f13b3c8f1e2b2f">More...</a><br/></td></tr>
<tr class="separator:ga304b699c1cacbc7fe6f13b3c8f1e2b2f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf5da523f9ccd58f988968f7cc10b23e1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf5da523f9ccd58f988968f7cc10b23e1">XAXIVDMA_BD_VSIZE_OFFSET</a>&#160;&#160;&#160;0x10</td></tr>
<tr class="memdesc:gaf5da523f9ccd58f988968f7cc10b23e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Vertical size.  <a href="#gaf5da523f9ccd58f988968f7cc10b23e1">More...</a><br/></td></tr>
<tr class="separator:gaf5da523f9ccd58f988968f7cc10b23e1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae76e8ca3b5117820ba1a23dab5e7a8e4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gae76e8ca3b5117820ba1a23dab5e7a8e4">XAXIVDMA_BD_HSIZE_OFFSET</a>&#160;&#160;&#160;0x14</td></tr>
<tr class="memdesc:gae76e8ca3b5117820ba1a23dab5e7a8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Horizontal size.  <a href="#gae76e8ca3b5117820ba1a23dab5e7a8e4">More...</a><br/></td></tr>
<tr class="separator:gae76e8ca3b5117820ba1a23dab5e7a8e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga260f7451d08e9e3afa7108a5af67e838"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga260f7451d08e9e3afa7108a5af67e838">XAXIVDMA_BD_STRIDE_OFFSET</a>&#160;&#160;&#160;0x18</td></tr>
<tr class="memdesc:ga260f7451d08e9e3afa7108a5af67e838"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stride size.  <a href="#ga260f7451d08e9e3afa7108a5af67e838">More...</a><br/></td></tr>
<tr class="separator:ga260f7451d08e9e3afa7108a5af67e838"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf1af4c3afa712d97d3f1af8153c9fb48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gaf1af4c3afa712d97d3f1af8153c9fb48">XAXIVDMA_BD_NUM_WORDS</a>&#160;&#160;&#160;7</td></tr>
<tr class="memdesc:gaf1af4c3afa712d97d3f1af8153c9fb48"><td class="mdescLeft">&#160;</td><td class="mdescRight">Total number of words for one BD.  <a href="#gaf1af4c3afa712d97d3f1af8153c9fb48">More...</a><br/></td></tr>
<tr class="separator:gaf1af4c3afa712d97d3f1af8153c9fb48"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab253772ebf384b0e4962efafa11916fb"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#gab253772ebf384b0e4962efafa11916fb">XAXIVDMA_BD_HW_NUM_BYTES</a>&#160;&#160;&#160;28</td></tr>
<tr class="memdesc:gab253772ebf384b0e4962efafa11916fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of bytes hw used.  <a href="#gab253772ebf384b0e4962efafa11916fb">More...</a><br/></td></tr>
<tr class="separator:gab253772ebf384b0e4962efafa11916fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga80f15b7cc612ff34dfa70ef2a5283fbd"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__axivdma.html#ga80f15b7cc612ff34dfa70ef2a5283fbd">XAXIVDMA_BD_BYTES_TO_CLEAR</a>&#160;&#160;&#160;20</td></tr>
<tr class="memdesc:ga80f15b7cc612ff34dfa70ef2a5283fbd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Skip next ptr when clearing.  <a href="#ga80f15b7cc612ff34dfa70ef2a5283fbd">More...</a><br/></td></tr>
<tr class="separator:ga80f15b7cc612ff34dfa70ef2a5283fbd"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<h2 class="groupheader">Macro Definition Documentation</h2>
<a class="anchor" id="ga80f15b7cc612ff34dfa70ef2a5283fbd"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_BYTES_TO_CLEAR&#160;&#160;&#160;20</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Skip next ptr when clearing. </p>

</div>
</div>
<a class="anchor" id="gae76e8ca3b5117820ba1a23dab5e7a8e4"></a>
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          <td class="memname">#define XAXIVDMA_BD_HSIZE_OFFSET&#160;&#160;&#160;0x14</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Horizontal size. </p>

</div>
</div>
<a class="anchor" id="gab253772ebf384b0e4962efafa11916fb"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_HW_NUM_BYTES&#160;&#160;&#160;28</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Number of bytes hw used. </p>

</div>
</div>
<a class="anchor" id="ga6f1b98d0a6280da333bc1a97adea974e"></a>
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          <td class="memname">#define XAXIVDMA_BD_MINIMUM_ALIGNMENT&#160;&#160;&#160;0x20</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Minimum byte alignment requirement for descriptors. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gab14c0b0487aeb3347b289eb58453e75d">XAxiVdma_SetBdAddrs()</a>.</p>

</div>
</div>
<a class="anchor" id="gad0a3a99c4177ed92eda1616fca2fcfb1"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_MINIMUM_ALIGNMENT_WD&#160;&#160;&#160;0x8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Minimum word alignment requirement for descriptors. </p>

</div>
</div>
<a class="anchor" id="gaf78dbbcc98154cea4b2447f6c84bc3f4"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_NDESC_OFFSET&#160;&#160;&#160;0x00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Next descriptor pointer. </p>

</div>
</div>
<a class="anchor" id="gaf1af4c3afa712d97d3f1af8153c9fb48"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_NUM_WORDS&#160;&#160;&#160;7</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Total number of words for one BD. </p>

</div>
</div>
<a class="anchor" id="ga304b699c1cacbc7fe6f13b3c8f1e2b2f"></a>
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          <td class="memname">#define XAXIVDMA_BD_START_ADDR_OFFSET&#160;&#160;&#160;0x08</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start address. </p>

</div>
</div>
<a class="anchor" id="ga260f7451d08e9e3afa7108a5af67e838"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_STRIDE_OFFSET&#160;&#160;&#160;0x18</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stride size. </p>

</div>
</div>
<a class="anchor" id="gaf5da523f9ccd58f988968f7cc10b23e1"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_BD_VSIZE_OFFSET&#160;&#160;&#160;0x10</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Vertical size. </p>

</div>
</div>
<a class="anchor" id="gad1bc694180b959ab0794ac6c4468a8ba"></a>
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          <td class="memname">#define XAXIVDMA_BUFTHRES_OFFSET&#160;&#160;&#160;0x0000001C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Line Buffer Thres. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold()</a>.</p>

</div>
</div>
<a class="anchor" id="gac6d688599e8a9ffdf9c45bd7789f58cc"></a>
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          <td class="memname">#define XAXIVDMA_CDESC_CURBD_MASK&#160;&#160;&#160;0xFFFFFFE0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>BD now working on. </p>

</div>
</div>
<a class="anchor" id="ga36d711874a8831f2b134a377488aefd2"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_CDESC_OFFSET&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Current descriptor pointer. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>, and <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>.</p>

</div>
</div>
<a class="anchor" id="ga001373abfc5971ca63943b4088f58e60"></a>
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          <td class="memname">#define XAXIVDMA_CHAN_FSYNC&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame Sync Source Selection. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>.</p>

</div>
</div>
<a class="anchor" id="gaaf3790410e85baac4ef181f1b77c8cdf"></a>
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          <td class="memname">#define XAxiVdma_ChannelHiFrmAddrDisable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Channel</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">{ <a class="code" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">\</a></div>
<div class="line"><a class="code" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">		XAxiVdma_WriteReg</a>(Channel-&gt;ChanBase, \</div>
<div class="line">                                  <a class="code" href="group__axivdma.html#ga8d67525132073b0a56a57233c9038c8a">XAXIVDMA_HI_FRMBUF_OFFSET</a>, (<a class="code" href="group__axivdma.html#gad0d12f32fff3037d4b1316350e02fef6">XAXIVDMA_REGINDEX_MASK</a> &gt;&gt; 1)); \</div>
<div class="line">        }</div>
<div class="ttc" id="group__axivdma_html_gad0d12f32fff3037d4b1316350e02fef6"><div class="ttname"><a href="group__axivdma.html#gad0d12f32fff3037d4b1316350e02fef6">XAXIVDMA_REGINDEX_MASK</a></div><div class="ttdeci">#define XAXIVDMA_REGINDEX_MASK</div><div class="ttdoc">Register Index. </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:205</div></div>
<div class="ttc" id="group__axivdma_html_ga8d67525132073b0a56a57233c9038c8a"><div class="ttname"><a href="group__axivdma.html#ga8d67525132073b0a56a57233c9038c8a">XAXIVDMA_HI_FRMBUF_OFFSET</a></div><div class="ttdeci">#define XAXIVDMA_HI_FRMBUF_OFFSET</div><div class="ttdoc">32 FrameBuf Sel </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:124</div></div>
<div class="ttc" id="group__axivdma_html_ga28900a15d22fc5a3729dfa102f5cbec9"><div class="ttname"><a href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a></div><div class="ttdeci">#define XAxiVdma_WriteReg(BaseAddress, RegOffset, Data)</div><div class="ttdoc">Write the given register. </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:355</div></div>
</div><!-- fragment -->
<p>Set the channel to disable access higher Frame Buffer Addresses (SG=0) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
  </table>
  </dd>
</dl>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

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<a class="anchor" id="gac1022ff84a093476cff8499bc4bbaae2"></a>
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          <td class="memname">#define XAxiVdma_ChannelHiFrmAddrEnable</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Channel</td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">
<b>Value:</b><div class="fragment"><div class="line">{ <a class="code" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">\</a></div>
<div class="line"><a class="code" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">		XAxiVdma_WriteReg</a>(Channel-&gt;ChanBase, \</div>
<div class="line">                                  <a class="code" href="group__axivdma.html#ga8d67525132073b0a56a57233c9038c8a">XAXIVDMA_HI_FRMBUF_OFFSET</a>, <a class="code" href="group__axivdma.html#gad0d12f32fff3037d4b1316350e02fef6">XAXIVDMA_REGINDEX_MASK</a>); \</div>
<div class="line">        }</div>
<div class="ttc" id="group__axivdma_html_gad0d12f32fff3037d4b1316350e02fef6"><div class="ttname"><a href="group__axivdma.html#gad0d12f32fff3037d4b1316350e02fef6">XAXIVDMA_REGINDEX_MASK</a></div><div class="ttdeci">#define XAXIVDMA_REGINDEX_MASK</div><div class="ttdoc">Register Index. </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:205</div></div>
<div class="ttc" id="group__axivdma_html_ga8d67525132073b0a56a57233c9038c8a"><div class="ttname"><a href="group__axivdma.html#ga8d67525132073b0a56a57233c9038c8a">XAXIVDMA_HI_FRMBUF_OFFSET</a></div><div class="ttdeci">#define XAXIVDMA_HI_FRMBUF_OFFSET</div><div class="ttdoc">32 FrameBuf Sel </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:124</div></div>
<div class="ttc" id="group__axivdma_html_ga28900a15d22fc5a3729dfa102f5cbec9"><div class="ttname"><a href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a></div><div class="ttdeci">#define XAxiVdma_WriteReg(BaseAddress, RegOffset, Data)</div><div class="ttdoc">Write the given register. </div><div class="ttdef"><b>Definition:</b> xaxivdma_hw.h:355</div></div>
</div><!-- fragment -->
<p>Set the channel to enable access to higher Frame Buffer Addresses (SG=0) </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
  </table>
  </dd>
</dl>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

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<a class="anchor" id="gabfed305b44e791eaae8142ab94bd0ba9"></a>
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          <td class="memname">#define XAXIVDMA_CR_FRMCNT_EN_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame count enable. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable()</a>.</p>

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<a class="anchor" id="ga7af6342cb5f43fa2036b3fbc8be1a082"></a>
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          <td class="memname">#define XAXIVDMA_CR_FSYNC_SRC_MASK&#160;&#160;&#160;0x00000060</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Fsync Source Select. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>.</p>

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<a class="anchor" id="ga627a79cc1c66dfbd98783d7f053fdd36"></a>
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          <td class="memname">#define XAXIVDMA_CR_GENLCK_RPT_MASK&#160;&#160;&#160;0x00008000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>GenLock Repeat. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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<a class="anchor" id="gac2bf28150cc3fc0d8cd0fceeedf60554"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_CR_GENLCK_SRC_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Genlock Source Select. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>.</p>

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<a class="anchor" id="gadb4ad98d2088b8488c6ec4e519449e36"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_CR_OFFSET&#160;&#160;&#160;0x00000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Channel control. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr()</a>, <a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr()</a>, <a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr()</a>, <a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt()</a>, <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>, <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>, <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>, <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, <a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable()</a>, <a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking()</a>, <a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop()</a>, <a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking()</a>, <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>, and <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>.</p>

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<a class="anchor" id="gaa5247e7518945ca4123cff1a2f2d8476"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_CR_RD_PTR_MASK&#160;&#160;&#160;0x00000F00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read pointer number. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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<a class="anchor" id="gafe377bb760c2aa781930960549690b87"></a>
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          <td class="memname">#define XAXIVDMA_CR_RD_PTR_SHIFT&#160;&#160;&#160;8</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift for read pointer number. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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</div>
<a class="anchor" id="gaacbafb1fba1bc73bd5ed95b06a5cb4f5"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_CR_RESET_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Reset channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, and <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>.</p>

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<a class="anchor" id="gaf6165b2a5668ffbfe3320c83f1a3ffaa"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_CR_RUNSTOP_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start/stop DMA channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, and <a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop()</a>.</p>

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<a class="anchor" id="gac70dd163b5142c5211e349e16f980e11"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_CR_SYNC_EN_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Gen-lock enable. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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<a class="anchor" id="ga6bda812084d25429b793e441c698298d"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_CR_TAIL_EN_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Tail ptr enable or Park. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking()</a>, and <a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking()</a>.</p>

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<a class="anchor" id="gac556991d9307f211f770d15a117ee937"></a>
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          <td class="memname">#define XAXIVDMA_DELAY_MASK&#160;&#160;&#160;0xFF000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Delay timeout counter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt()</a>, and <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>.</p>

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<a class="anchor" id="gafa8a6604771dc02e3a96eb09ac16fcaa"></a>
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<div class="memproto">
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          <td class="memname">#define XAXIVDMA_DEVICE_READY&#160;&#160;&#160;0x11111111</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Flag to signal that device is ready to be used. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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<a class="anchor" id="gaef1fd25fb7d569716f06428a2cb252a6"></a>
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          <td class="memname">#define XAXIVDMA_ENABLE_DBG_THRESHOLD_REG&#160;&#160;&#160;0x01</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Debug Configuration Parameter Constants (C_ENABLE_DEBUG_INFO_*) </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold()</a>.</p>

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<a class="anchor" id="gae49d9133e0ce94d33014c1277b1a4002"></a>
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          <td class="memname">#define XAXIVDMA_EXTERNAL_GENLOCK&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>GenLock Source Selection. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>.</p>

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<a class="anchor" id="ga7e274c9f02af4538043f757c3e224a91"></a>
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          <td class="memname">#define XAXIVDMA_FRM_MAX&#160;&#160;&#160;0xF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>At most 16 frames. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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<a class="anchor" id="gaf4ab4ba9a0c2984efad7fefe195fe0ed"></a>
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          <td class="memname">#define XAXIVDMA_FRMCNT_MASK&#160;&#160;&#160;0x00FF0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame counter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt()</a>, and <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>.</p>

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<a class="anchor" id="ga76abb6dc712998f6165b074dccc4670e"></a>
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          <td class="memname">#define XAXIVDMA_FRMDLY_MASK&#160;&#160;&#160;0x0F000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame delay. </p>

</div>
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<a class="anchor" id="gaecab8ebcc9f83abc6b88289fb11b9440"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_FRMDLY_MAX&#160;&#160;&#160;0xF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Maximum frame delay. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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<a class="anchor" id="ga266367de39275d3e11a96966a4039130"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_FRMDLY_SHIFT&#160;&#160;&#160;24</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Shift for frame delay. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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<a class="anchor" id="gacc02fa25db65faceed9fd49ee88fb609"></a>
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          <td class="memname">#define XAXIVDMA_FRMSTORE_OFFSET&#160;&#160;&#160;0x00000018</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame Store. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga83d55bee4a575b0fdd98d1013a26533e">XAxiVdma_GetFrmStore()</a>, and <a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore()</a>.</p>

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<a class="anchor" id="ga36e2b755a604e36829faf28153035830"></a>
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          <td class="memname">#define XAXIVDMA_GENLOCK_MASTER&#160;&#160;&#160;0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>GenLock Mode Constants. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>.</p>

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<a class="anchor" id="ga7ed954b5de3073f15b8e47c5736d627b"></a>
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          <td class="memname">#define XAXIVDMA_HANDLER_ERROR&#160;&#160;&#160;2</td>
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      </table>
</div><div class="memdoc">

<p>Error Interrupt Type. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>.</p>

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<a class="anchor" id="ga4c57db0180eafe041035a8d4781cb2b9"></a>
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          <td class="memname">#define XAXIVDMA_HANDLER_GENERAL&#160;&#160;&#160;1</td>
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      </table>
</div><div class="memdoc">

<p>Interrupt type for setting up callback. </p>
<p>Non-Error Interrupt Type </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>.</p>

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          <td class="memname">#define XAXIVDMA_HI_FRMBUF_OFFSET&#160;&#160;&#160;0x00000014</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>32 FrameBuf Sel </p>

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          <td class="memname">#define XAXIVDMA_HSIZE_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Horizontal size. </p>

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          <td class="memname">#define XAXIVDMA_HSIZE_OFFSET&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
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<p>Horizontal size. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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          <td class="memname">#define XAXIVDMA_IXR_ALL_MASK&#160;&#160;&#160;0x00007000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All interrupts. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr()</a>, <a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr()</a>, <a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr()</a>, <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, and <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>.</p>

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          <td class="memname">#define XAXIVDMA_IXR_COMPLETION_MASK&#160;&#160;&#160;0x00003000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Completion interrupts. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">#define XAXIVDMA_IXR_DELAYCNT_MASK&#160;&#160;&#160;0x00002000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Delay interrupt. </p>

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          <td class="memname">#define XAXIVDMA_IXR_ERROR_MASK&#160;&#160;&#160;0x00004000</td>
        </tr>
      </table>
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<p>Error interrupt. </p>

<p>Referenced by <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">#define XAXIVDMA_IXR_FRMCNT_MASK&#160;&#160;&#160;0x00001000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame count intr. </p>

<p>Referenced by <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname">#define XAXIVDMA_MAX_FRAMESTORE&#160;&#160;&#160;32</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Maximum number of the frame store. </p>
<p>Maximum # of the frame store </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

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          <td class="memname">#define XAXIVDMA_MAX_FRAMESTORE_64&#160;&#160;&#160;16</td>
        </tr>
      </table>
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<p>Maximum # of the frame store for 64 bit. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

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          <td class="memname">#define XAXIVDMA_MISMATCH_ERROR&#160;&#160;&#160;0x80000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Frame/Line Mismatch Error This is a typical DMA Internal Error, which on detection doesnt require a reset (as opposed to other errors). </p>
<p>So a MSB bit is set to identify it, from other DMA Internal Errors. </p>

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          <td class="memname">#define XAXIVDMA_MM2S_ADDR_OFFSET&#160;&#160;&#160;0x00000050</td>
        </tr>
      </table>
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<p>MM2S channel Addr. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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          <td class="memname">#define XAXIVDMA_PARKPTR_OFFSET&#160;&#160;&#160;0x00000028</td>
        </tr>
      </table>
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<p>Park Pointer Register. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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          <td class="memname">#define XAXIVDMA_PARKPTR_READREF_MASK&#160;&#160;&#160;0x0000001F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Read frame to park on. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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          <td class="memname">#define XAXIVDMA_PARKPTR_READSTR_MASK&#160;&#160;&#160;0x001F0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Current read frame. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>.</p>

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<a class="anchor" id="ga9656852c690e3a7e5253fe67b87f10cf"></a>
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          <td class="memname">#define XAXIVDMA_PARKPTR_WRTREF_MASK&#160;&#160;&#160;0x00001F00</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Write frame to park on. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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          <td class="memname">#define XAXIVDMA_PARKPTR_WRTSTR_MASK&#160;&#160;&#160;0x1F000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Current write frame. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>.</p>

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          <td class="memname">#define XAXIVDMA_READ&#160;&#160;&#160;2</td>
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<p>DMA transfer from memory. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>, <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>, and <a class="el" href="group__axivdma.html#gab2646b6aeea2ff64c4b42319ffb49804">XAxiVdma_StartReadFrame()</a>.</p>

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          <td class="memname">#define XAxiVdma_ReadReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XAxiVdma_In32((BaseAddress) + (RegOffset))</td>
        </tr>
      </table>
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<p>Read the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the device </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to be read</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The 32-bit value of the register</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: u32 <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e" title="Read the given register. ">XAxiVdma_ReadReg(u32 BaseAddress, u32 RegOffset)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr()</a>, <a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr()</a>, <a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr()</a>, <a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt()</a>, <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, <a class="el" href="group__axivdma.html#gae429b7acc7449fcb805ae013528c9ba0">XAxiVdma_ChannelGetStatus()</a>, <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>, <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>, <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>, <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, <a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable()</a>, <a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking()</a>, <a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop()</a>, <a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking()</a>, <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>, <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, <a class="el" href="group__axivdma.html#ga83d55bee4a575b0fdd98d1013a26533e">XAxiVdma_GetFrmStore()</a>, <a class="el" href="group__axivdma.html#ga24f182cf8678e4df6e0e2b19e2f50620">XAxiVdma_GetVersion()</a>, <a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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          <td class="memname">#define XAXIVDMA_REGINDEX_MASK&#160;&#160;&#160;0x00000001</td>
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      </table>
</div><div class="memdoc">

<p>Register Index. </p>

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          <td class="memname">#define XAXIVDMA_RX_OFFSET&#160;&#160;&#160;0x00000030</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>RX channel registers base. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

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          <td class="memname">#define XAXIVDMA_S2MM_ADDR_OFFSET&#160;&#160;&#160;0x000000A0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>S2MM channel Addr. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<a class="anchor" id="gae3281565e12c47c4888e228ec6a59e3c"></a>
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          <td class="memname">#define XAXIVDMA_S2MM_DMA_IRQ_MASK_OFFSET&#160;&#160;&#160;0x0000003C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>S2MM Err IRQ Mask. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr()</a>.</p>

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<a class="anchor" id="ga0ba0af99c40314b1288a6a95ba2ee688"></a>
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          <td class="memname">#define XAXIVDMA_S2MM_IRQ_ERR_ALL_MASK&#160;&#160;&#160;0x0000000F</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Masks all S2MM IRQ Errors. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr()</a>.</p>

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          <td class="memname">#define XAXIVDMA_S2MM_IRQ_FSZLESS_SOF_ERLY_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Masks S2MM IRQ FSize Less/SOF Early Error. </p>

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<a class="anchor" id="ga19f83bb8bcb2f6535463bcd03f39552e"></a>
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          <td class="memname">#define XAXIVDMA_S2MM_IRQ_FSZMORE_SOF_LATE_MASK&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Masks S2MM IRQ FSize More/SOF Late Error. </p>

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<a class="anchor" id="ga60eb583a54045686ff42ea1e93fd67dd"></a>
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          <td class="memname">#define XAXIVDMA_S2MM_IRQ_LSZLESS_EOL_ERLY_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Masks S2MM IRQ LSize Less/EOL Early Error. </p>

</div>
</div>
<a class="anchor" id="ga0deb90d1e246708ed32ed905d56894e9"></a>
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          <td class="memname">#define XAXIVDMA_S2MM_IRQ_LSZMORE_EOL_LATE_MASK&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Masks S2MM IRQ LSize More/EOL Late Error. </p>

</div>
</div>
<a class="anchor" id="ga9fe7dc9348c9a4aed7eb2f671e62dda7"></a>
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_ALL_MASK&#160;&#160;&#160;0x00000FF0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>All errors. </p>

</div>
</div>
<a class="anchor" id="gaafc34ba20bfb44a6132fb677b4a28d9d"></a>
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_DECODE_MASK&#160;&#160;&#160;0x00000040</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Datamover decode err. </p>

</div>
</div>
<a class="anchor" id="ga5e70b134baebf4f1a124700d8601325b"></a>
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_FSZ_LESS_MASK&#160;&#160;&#160;0x00000080</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>FSize Less Mismatch err. </p>

</div>
</div>
<a class="anchor" id="ga27f1501ec6a048b6afa3e66720d971e3"></a>
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<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_FSZ_MORE_MASK&#160;&#160;&#160;0x00000800</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>FSize More Mismatch err. </p>

</div>
</div>
<a class="anchor" id="ga73f14cc8e7e2905ed537d3848b31c23b"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_INTERNAL_MASK&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Datamover internal err. </p>

</div>
</div>
<a class="anchor" id="ga8b94d44f1347a7c92370f63855015ba4"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_LSZ_LESS_MASK&#160;&#160;&#160;0x00000100</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>LSize Less Mismatch err. </p>

</div>
</div>
<a class="anchor" id="ga228552801c02459e8941f66b55aee2fe"></a>
<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_SG_DEC_MASK&#160;&#160;&#160;0x00000400</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>SG decode err. </p>

</div>
</div>
<a class="anchor" id="ga30c9fca88a18c4bcde79ddf03cd6d240"></a>
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_SG_SLV_MASK&#160;&#160;&#160;0x00000200</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>SG slave err. </p>

</div>
</div>
<a class="anchor" id="ga08d366ceff80640f727d34668680f7a0"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_ERR_SLAVE_MASK&#160;&#160;&#160;0x00000020</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Datamover slave err. </p>

</div>
</div>
<a class="anchor" id="ga950f0fc166fb91f145538984a3b3f29f"></a>
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          <td class="memname">#define XAXIVDMA_SR_HALTED_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DMA channel halted. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>.</p>

</div>
</div>
<a class="anchor" id="gad3ebc688ce8c9515277296cd7c9d9d68"></a>
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_IDLE_MASK&#160;&#160;&#160;0x00000002</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>DMA channel idle. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>.</p>

</div>
</div>
<a class="anchor" id="ga0617c0c161fd2d93690e2d3b0a0906b8"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_SR_OFFSET&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Status. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, <a class="el" href="group__axivdma.html#gae429b7acc7449fcb805ae013528c9ba0">XAxiVdma_ChannelGetStatus()</a>, <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>, <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, and <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>.</p>

</div>
</div>
<a class="anchor" id="gaba552b4bc0c96fb9d76ef37e9fc34da7"></a>
<div class="memitem">
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      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_START_ADDR_LEN&#160;&#160;&#160;0x00000004</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Each entry is 4 bytes. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

</div>
</div>
<a class="anchor" id="ga83c97295f4a50d39cacbb32fa928ea95"></a>
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<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_START_ADDR_MSB_OFFSET&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start of address. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

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</div>
<a class="anchor" id="ga73ce4a1f2caf365b8c54cd77827a29cc"></a>
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          <td class="memname">#define XAXIVDMA_START_ADDR_OFFSET&#160;&#160;&#160;0x0000000C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start of address. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>.</p>

</div>
</div>
<a class="anchor" id="ga5e165469c0c5618932b44f17dcfa566b"></a>
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          <td class="memname">#define XAXIVDMA_STRD_FRMDLY_OFFSET&#160;&#160;&#160;0x00000008</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Horizontal size. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="gac73189f5e640fc37597a0559e67e7dce"></a>
<div class="memitem">
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        <tr>
          <td class="memname">#define XAXIVDMA_STRIDE_MASK&#160;&#160;&#160;0x0000FFFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stride size. </p>

</div>
</div>
<a class="anchor" id="gaa47b0fa02c5e8f984bc17bf18cd379ce"></a>
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          <td class="memname">#define XAXIVDMA_TDESC_CURBD_MASK&#160;&#160;&#160;0xFFFFFFE0</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>BD to stop on. </p>

</div>
</div>
<a class="anchor" id="ga8a1e429317226b3d7a3e9ee29688c3ab"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_TDESC_OFFSET&#160;&#160;&#160;0x00000010</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Tail descriptor pointer. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>, and <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>.</p>

</div>
</div>
<a class="anchor" id="gae1497f30a25302cb0f4ec93a16a23100"></a>
<div class="memitem">
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      <table class="memname">
        <tr>
          <td class="memname">#define XAXIVDMA_TX_OFFSET&#160;&#160;&#160;0x00000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>TX channel registers base. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

</div>
</div>
<a class="anchor" id="ga778f82c0f80720c8114b09dd840dd625"></a>
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          <td class="memname">#define XAXIVDMA_VERSION_MAJOR_MASK&#160;&#160;&#160;0xF0000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Major version. </p>

</div>
</div>
<a class="anchor" id="ga5d2a6902e976af18d7486fe12d45ba9b"></a>
<div class="memitem">
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          <td class="memname">#define XAXIVDMA_VERSION_MINOR_MASK&#160;&#160;&#160;0x0FF00000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Minor version. </p>

</div>
</div>
<a class="anchor" id="ga727fc3fe53b19cda302295ad25fe71a2"></a>
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          <td class="memname">#define XAXIVDMA_VERSION_OFFSET&#160;&#160;&#160;0x0000002C</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Version register. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga24f182cf8678e4df6e0e2b19e2f50620">XAxiVdma_GetVersion()</a>.</p>

</div>
</div>
<a class="anchor" id="gae651c29e871bbdd802cecc9fb45948b3"></a>
<div class="memitem">
<div class="memproto">
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          <td class="memname">#define XAXIVDMA_VERSION_REV_MASK&#160;&#160;&#160;0x000F0000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Revision letter. </p>

</div>
</div>
<a class="anchor" id="ga950309f30a54347e542bdfd2edff187c"></a>
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          <td class="memname">#define XAXIVDMA_VFLIP_EN_MASK&#160;&#160;&#160;0x00000001</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Vertical flip enable. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

</div>
</div>
<a class="anchor" id="ga2ab424fdb1d7af6bbc66d02193c511ab"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_VFLIP_OFFSET&#160;&#160;&#160;0x000000EC</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Enable Vertical Flip Register. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>.</p>

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</div>
<a class="anchor" id="ga8394a54d3cfaf11b3b824059d760d5d8"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_VSIZE_MASK&#160;&#160;&#160;0x00001FFF</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Vertical size. </p>

</div>
</div>
<a class="anchor" id="ga4feada9ad41cf079a8c9b7c6aebfecff"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_VSIZE_OFFSET&#160;&#160;&#160;0x00000000</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Vertical size. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>.</p>

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</div>
<a class="anchor" id="ga525d0fa8fc04a9dde871ab55cf6b227b"></a>
<div class="memitem">
<div class="memproto">
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        <tr>
          <td class="memname">#define XAXIVDMA_WRITE&#160;&#160;&#160;1</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>VDMA data transfer direction. </p>
<p>DMA transfer into memory </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>, <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, <a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr()</a>, <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>, <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>, <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>, <a class="el" href="group__axivdma.html#ga1dc126d885558e03cf06a4d9c05d5668">XAxiVdma_StartWriteFrame()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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</div>
<a class="anchor" id="ga28900a15d22fc5a3729dfa102f5cbec9"></a>
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<div class="memproto">
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          <td class="memname">#define XAxiVdma_WriteReg</td>
          <td>(</td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">BaseAddress, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">RegOffset, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">&#160;</td>
          <td class="paramname">Data&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td>&#160;&#160;&#160;XAxiVdma_Out32((BaseAddress) + (RegOffset), (Data))</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Write the given register. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">BaseAddress</td><td>is the base address of the device </td></tr>
    <tr><td class="paramname">RegOffset</td><td>is the register offset to be written </td></tr>
    <tr><td class="paramname">Data</td><td>is the 32-bit value to write to the register</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>C-style signature: void <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9" title="Write the given register. ">XAxiVdma_WriteReg(u32 BaseAddress, u32 RegOffset, u32 Data)</a> </dd></dl>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr()</a>, <a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr()</a>, <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>, <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>, <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>, <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, <a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable()</a>, <a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking()</a>, <a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop()</a>, <a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking()</a>, <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, <a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr()</a>, <a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore()</a>, <a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

</div>
</div>
<h2 class="groupheader">Typedef Documentation</h2>
<a class="anchor" id="ga07f81ffdbceb0024e3a675a787ca3d90"></a>
<div class="memitem">
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          <td class="memname">typedef void(* XAxiVdma_CallBack)(void *CallBackRef, u32 InterruptTypes)</td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Callback type for general interrupts. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the upper layer when setting the callback functions, and passed back to the upper layer when the callback is called. </td></tr>
    <tr><td class="paramname">InterruptTypes</td><td>indicates the detailed type(s) of the interrupt. Its value equals 'OR'ing one or more XAXIVDMA_IXR_* values defined in <a class="el" href="xaxivdma__hw_8h.html">xaxivdma_hw.h</a> </td></tr>
  </table>
  </dd>
</dl>

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          <td class="memname">typedef void(* XAxiVdma_ErrorCallBack)(void *CallBackRef, u32 ErrorMask)</td>
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<p>Callback type for Error interrupt. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">CallBackRef</td><td>is a callback reference passed in by the upper layer when setting the callback function, and it is passed back to the upper layer when the callback is called. </td></tr>
    <tr><td class="paramname">ErrorMask</td><td>is a bit mask indicating the cause of the error. Its value equals 'OR'ing one or more XAXIVDMA_IXR_* values defined in <a class="el" href="xaxivdma__hw_8h.html">xaxivdma_hw.h</a> </td></tr>
  </table>
  </dd>
</dl>

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<h2 class="groupheader">Function Documentation</h2>
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          <td class="memname">int XAxiVdma_CfgInitialize </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___config.html">XAxiVdma_Config</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>EffectiveAddr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Initialize the driver with hardware configuration. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is the pointer to the hardware configuration structure </td></tr>
    <tr><td class="paramname">EffectiveAddr</td><td>is the virtual address map for the device</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if everything goes fine</li>
<li>XST_FAILURE if reset the hardware failed, need system reset to recover</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel fails reset, then it will be set as invalid </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaefe77aff2f380aac9be64645ca606696">XAxiVdma_Config::AddrWidth</a>, <a class="el" href="group__axivdma.html#ga49f2cc215d38001d678803c690aa6dd5">XAxiVdma::AddrWidth</a>, <a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a>, <a class="el" href="group__axivdma.html#gaf3e1965613b2d1a437d798e8a37df333">XAxiVdma_ChannelCallBack::CompletionCallBack</a>, <a class="el" href="group__axivdma.html#gae3bce37353c26d5b2f077a100cdc7bd4">XAxiVdma_Config::EnableAllDbgFeatures</a>, <a class="el" href="group__axivdma.html#ga8bde9bc1e0f2871e63eebff6b4d3a11f">XAxiVdma_ChannelCallBack::ErrCallBack</a>, <a class="el" href="group__axivdma.html#ga0ff6f00da81986d480ae3baed727e4a9">XAxiVdma_Config::FlushonFsync</a>, <a class="el" href="group__axivdma.html#gae737875f784d02112726509846784dd1">XAxiVdma_Config::HasMm2S</a>, <a class="el" href="group__axivdma.html#gac5806353d2211d78f4c963dd7b018ac9">XAxiVdma::HasMm2S</a>, <a class="el" href="group__axivdma.html#gae673d8167e09607574eafbcebd1f0059">XAxiVdma_Config::HasMm2SDRE</a>, <a class="el" href="group__axivdma.html#gac0131f5b3987b78fe975c03f264586a6">XAxiVdma_Config::HasS2Mm</a>, <a class="el" href="group__axivdma.html#ga22a700bda0eb14878a0c343fbac77456">XAxiVdma::HasS2Mm</a>, <a class="el" href="group__axivdma.html#ga88e3b8ed3aa34aec7d9936681eadae97">XAxiVdma_Config::HasS2MmDRE</a>, <a class="el" href="group__axivdma.html#gaf28619bcd27f94ceaf47bbeb0cb0400c">XAxiVdma_Config::HasSG</a>, <a class="el" href="group__axivdma.html#gad116974229d0e33b61767742f42d9584">XAxiVdma::HasSG</a>, <a class="el" href="group__axivdma.html#ga759dfd5ee4156f725ec65fe154fa2f89">XAxiVdma_Config::HasVFlip</a>, <a class="el" href="group__axivdma.html#ga990e5208e4320a26ca4cc8f50407489d">XAxiVdma_Config::InternalGenLock</a>, <a class="el" href="group__axivdma.html#ga3af417807133e29a55867f9c853fa25b">XAxiVdma::InternalGenLock</a>, <a class="el" href="group__axivdma.html#ga8b4441757224aa73135d6ed334bacdb5">XAxiVdma::IsReady</a>, <a class="el" href="group__axivdma.html#gabbeae935b306619b3e2d41598ea1727e">XAxiVdma_Config::MaxFrameStoreNum</a>, <a class="el" href="group__axivdma.html#gac5420b0f3823998ce975acbaf1c174b2">XAxiVdma::MaxNumFrames</a>, <a class="el" href="group__axivdma.html#ga14b3296d09ee88ac27a415ca2452a60e">XAxiVdma_Config::Mm2SBufDepth</a>, <a class="el" href="group__axivdma.html#ga3f3291160fad20f64ce2e18efcfe8566">XAxiVdma_Config::Mm2SDlyCntrEn</a>, <a class="el" href="group__axivdma.html#gaca0e931b1418fda82650456d7639b752">XAxiVdma_Config::Mm2SFrmCntrEn</a>, <a class="el" href="group__axivdma.html#gad04ebadf6c05c481198b6b27e5e9eec8">XAxiVdma_Config::Mm2SFrmStoreRegEn</a>, <a class="el" href="group__axivdma.html#ga7057aa6b1b3614612b2b1331ec6afd87">XAxiVdma_Config::Mm2SGenLock</a>, <a class="el" href="group__axivdma.html#ga569bedc89182bd0542f62580767c98d3">XAxiVdma_Config::Mm2SStreamWidth</a>, <a class="el" href="group__axivdma.html#gacda6ef717d6af941e0f0c8dc90185a24">XAxiVdma_Config::Mm2SThresRegEn</a>, <a class="el" href="group__axivdma.html#gaf7a988cf756f60c718d29e2f3273764b">XAxiVdma_Config::Mm2SWordLen</a>, <a class="el" href="group__axivdma.html#gac2cdde8d751e11e934ecea898574e99a">XAxiVdma::ReadCallBack</a>, <a class="el" href="group__axivdma.html#gae165f3cbaa2eb57aa1708743e45aa845">XAxiVdma_Config::S2MmBufDepth</a>, <a class="el" href="group__axivdma.html#ga263c9059a1a7220c0d082791d1f99681">XAxiVdma_Config::S2MmDlyCntrEn</a>, <a class="el" href="group__axivdma.html#gac0f7d3262d6a8a66cb68516be91f9fa0">XAxiVdma_Config::S2MmFrmCntrEn</a>, <a class="el" href="group__axivdma.html#ga5835e4da4043a081141184f760894960">XAxiVdma_Config::S2MmFrmStoreRegEn</a>, <a class="el" href="group__axivdma.html#ga7938ca3c609d8a44a05cf81cde30a4a7">XAxiVdma_Config::S2MmGenLock</a>, <a class="el" href="group__axivdma.html#ga7de365f4e644f7d357dfb5aea0ba4241">XAxiVdma_Config::S2MmSOF</a>, <a class="el" href="group__axivdma.html#gaf8169029d1b2a372478df2ad52c99ae3">XAxiVdma_Config::S2MmStreamWidth</a>, <a class="el" href="group__axivdma.html#ga83e466b0e6d0b8711db0372000009c9b">XAxiVdma_Config::S2MmThresRegEn</a>, <a class="el" href="group__axivdma.html#gaef8758d32c62de587d9e57fed56c01ee">XAxiVdma_Config::S2MmWordLen</a>, <a class="el" href="group__axivdma.html#gab97aef716c82252eeb7eb12832a31dd5">XAxiVdma_Config::UseFsync</a>, <a class="el" href="group__axivdma.html#ga2158cdab0215f4079c14741e1af43c5d">XAxiVdma::UseFsync</a>, <a class="el" href="group__axivdma.html#gae92ec1b3f2075167e0f552a75ecfde46">XAxiVdma::WriteCallBack</a>, <a class="el" href="group__axivdma.html#gad1bc694180b959ab0794ac6c4468a8ba">XAXIVDMA_BUFTHRES_OFFSET</a>, <a class="el" href="group__axivdma.html#gae429b7acc7449fcb805ae013528c9ba0">XAxiVdma_ChannelGetStatus()</a>, <a class="el" href="group__axivdma.html#ga795e26fb85aa4140db060d731a19efeb">XAxiVdma_ChannelInit()</a>, <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>, <a class="el" href="group__axivdma.html#gafa8a6604771dc02e3a96eb09ac16fcaa">XAXIVDMA_DEVICE_READY</a>, <a class="el" href="group__axivdma.html#gaef1fd25fb7d569716f06428a2cb252a6">XAXIVDMA_ENABLE_DBG_THRESHOLD_REG</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga6d94757e1f4835c0975b13f0ab543f8b">XAXIVDMA_MM2S_ADDR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#gab97c05cd73a22a627177554199efb526">XAXIVDMA_RX_OFFSET</a>, <a class="el" href="group__axivdma.html#ga8daae8241a3aeae54627939188febf71">XAXIVDMA_S2MM_ADDR_OFFSET</a>, <a class="el" href="group__axivdma.html#gae1497f30a25302cb0f4ec93a16a23100">XAXIVDMA_TX_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__selftest_8c.html#a2bc69805483ffec0bc6e4115a9e2375a">AxiVDMASelfTestExample()</a>, <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelConfig </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XAxiVdma_ChannelSetup *&#160;</td>
          <td class="paramname"><em>ChannelCfgPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configure one DMA channel using the configuration structure. </p>
<p>Setup the control register and BDs, however, BD addresses are not set.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">ChannelCfgPtr</td><td>is the pointer to the setup structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE if channel has not being initialized</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle</li>
<li>XST_INVALID_PARAM if fields in ChannelCfgPtr is not valid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, <a class="el" href="group__axivdma.html#gabfed305b44e791eaae8142ab94bd0ba9">XAXIVDMA_CR_FRMCNT_EN_MASK</a>, <a class="el" href="group__axivdma.html#ga627a79cc1c66dfbd98783d7f053fdd36">XAXIVDMA_CR_GENLCK_RPT_MASK</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gaa5247e7518945ca4123cff1a2f2d8476">XAXIVDMA_CR_RD_PTR_MASK</a>, <a class="el" href="group__axivdma.html#gafe377bb760c2aa781930960549690b87">XAXIVDMA_CR_RD_PTR_SHIFT</a>, <a class="el" href="group__axivdma.html#gac70dd163b5142c5211e349e16f980e11">XAXIVDMA_CR_SYNC_EN_MASK</a>, <a class="el" href="group__axivdma.html#ga6bda812084d25429b793e441c698298d">XAXIVDMA_CR_TAIL_EN_MASK</a>, <a class="el" href="group__axivdma.html#ga7e274c9f02af4538043f757c3e224a91">XAXIVDMA_FRM_MAX</a>, <a class="el" href="group__axivdma.html#gaecab8ebcc9f83abc6b88289fb11b9440">XAXIVDMA_FRMDLY_MAX</a>, <a class="el" href="group__axivdma.html#ga266367de39275d3e11a96966a4039130">XAXIVDMA_FRMDLY_SHIFT</a>, <a class="el" href="group__axivdma.html#ga36e2b755a604e36829faf28153035830">XAXIVDMA_GENLOCK_MASTER</a>, <a class="el" href="group__axivdma.html#gaa1752ade8b38bc29a8528859e634a38d">XAXIVDMA_HSIZE_OFFSET</a>, <a class="el" href="group__axivdma.html#ga311f4eadce692b10effb8cd492b2120c">XAXIVDMA_PARKPTR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga39001a9b8ae972fc53463961ca423ac1">XAXIVDMA_PARKPTR_READREF_MASK</a>, <a class="el" href="group__axivdma.html#ga9656852c690e3a7e5253fe67b87f10cf">XAXIVDMA_PARKPTR_WRTREF_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga5e165469c0c5618932b44f17dcfa566b">XAXIVDMA_STRD_FRMDLY_OFFSET</a>, <a class="el" href="group__axivdma.html#ga950309f30a54347e542bdfd2edff187c">XAXIVDMA_VFLIP_EN_MASK</a>, <a class="el" href="group__axivdma.html#ga2ab424fdb1d7af6bbc66d02193c511ab">XAXIVDMA_VFLIP_OFFSET</a>, <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, and <a class="el" href="group__axivdma.html#ga3c50e96d431d9f1ee7d6200266c0dbd3">XAxiVdma_DmaConfig()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelDisableIntr </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Disable interrupts for a channel. </p>
<p>Interrupts that are not specified by the interrupt mask are not affected.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the interrupt mask for interrupts to be disabled</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaba9a0ebdb72696e24ccaa48e57802323">XAxiVdma_IntrDisable()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelEnableIntr </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Enable interrupts for a channel. </p>
<p>Interrupts that are not specified by the interrupt mask are not affected.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the interrupt mask for interrupts to be enabled</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga4c687431dde198458fb4e42dff22c106">XAxiVdma_IntrEnable()</a>.</p>

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          <td class="memname">u32 XAxiVdma_ChannelGetEnabledIntr </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Get the enabled interrupts of a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The interrupts mask represents pending interrupts. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>, and <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelGetFrmCnt </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>FrmCnt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>DlyCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get the frame counter and delay counter for both channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">FrmCnt</td><td>is the pointer for the returning frame counter value </td></tr>
    <tr><td class="paramname">DlyCnt</td><td>is the pointer for the returning delay counter value</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If FrmCnt return as 0, then the channel is not initialized </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gac556991d9307f211f770d15a117ee937">XAXIVDMA_DELAY_MASK</a>, <a class="el" href="group__axivdma.html#gaf4ab4ba9a0c2984efad7fefe195fe0ed">XAXIVDMA_FRMCNT_MASK</a>, and <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>.</p>

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          <td class="memname">u32 XAxiVdma_ChannelGetPendingIntr </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get pending interrupts of a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The interrupts mask represents pending interrupts. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga90501638e7f1077232443f0a60b3b40d">XAxiVdma_IntrGetPending()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">u32 XAxiVdma_ChannelGetStatus </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get the current status of a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the channel </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#ga15653f0679e3a33efd384598b6c42e08">XAxiVdma_GetStatus()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelInit </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Initialize a channel of a DMA engine. </p>
<p>This function initializes the BD ring for this channel</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelIntrClear </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clear interrupts of a channel. </p>
<p>Interrupts that are not specified by the interrupt mask are not affected.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the interrupt mask for interrupts to be cleared</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga6e80967b83e9f0f65dfde6c92008f0d2">XAXIVDMA_IXR_ALL_MASK</a>, <a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaaba3bd6f623637f15e16176ea77213b3">XAxiVdma_IntrClear()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelIsBusy </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Check whether a DMA channel is busy. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>non zero if the channel is busy</li>
<li>0 is the channel is idle </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga950f0fc166fb91f145538984a3b3f29f">XAXIVDMA_SR_HALTED_MASK</a>, <a class="el" href="group__axivdma.html#gad3ebc688ce8c9515277296cd7c9d9d68">XAXIVDMA_SR_IDLE_MASK</a>, and <a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#ga1703c6dcef193966f4f1db7e6e9e59ce">XAxiVdma_ChannelSetBdAddrs()</a>, <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, and <a class="el" href="group__axivdma.html#ga0fc5b39aabb8d4f56b0dd2024ea5bff2">XAxiVdma_IsBusy()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelRegisterDump </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Dump registers from one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga36d711874a8831f2b134a377488aefd2">XAXIVDMA_CDESC_OFFSET</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga0617c0c161fd2d93690e2d3b0a0906b8">XAXIVDMA_SR_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga8a1e429317226b3d7a3e9ee29688c3ab">XAXIVDMA_TDESC_OFFSET</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gab51f0d1f195db6af2dd3023e5c80eb5c">XAxiVdma_DmaRegisterDump()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelReset </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function resets one DMA channel. </p>
<p>The registers will be default values after the reset</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gaacbafb1fba1bc73bd5ed95b06a5cb4f5">XAXIVDMA_CR_RESET_MASK</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga8dbd2faa070ca571f049e3b61f9bdb1e">XAxiVdma_Reset()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelResetNotDone </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>This function checks whether reset operation is done. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>0 if reset is done</li>
<li>1 if reset is still going </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gaacbafb1fba1bc73bd5ed95b06a5cb4f5">XAXIVDMA_CR_RESET_MASK</a>, and <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga3e01bd69f101126d5962f7078ee3e520">XAxiVdma_ResetNotDone()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelSetBdAddrs </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>BdAddrPhys</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR&#160;</td>
          <td class="paramname"><em>BdAddrVirt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Setup BD addresses to a different memory region. </p>
<p>In some systems, it is convenient to put BDs into a certain region of the memory. This function enables that.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">BdAddrPhys</td><td>is the physical starting address for BDs </td></tr>
    <tr><td class="paramname">BdAddrVirt</td><td>is the Virtual starting address for BDs. For systems that do not use MMU, then virtual address is the same as physical address</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS for a successful setup</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
</ul>
</dd></dl>
<p>We assume that the memory region starting from BdAddrPhys is large enough to hold all the BDs. </p>

<p>References <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gab14c0b0487aeb3347b289eb58453e75d">XAxiVdma_SetBdAddrs()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelSetBufferAddr </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR *&#160;</td>
          <td class="paramname"><em>BufferAddrSet</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>NumFrames</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure buffer addresses for one DMA channel. </p>
<p>The buffer addresses are physical addresses. Access to 32 Frame Buffer Addresses in direct mode is done through XAxiVdma_ChannelHiFrmAddrEnable/Disable Functions. 0 - Access Bank0 Registers (0x5C - 0x98) 1 - Access Bank1 Registers (0x5C - 0x98)</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">BufferAddrSet</td><td>is the set of addresses for the transfers </td></tr>
    <tr><td class="paramname">NumFrames</td><td>is the number of frames to set the address</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE if channel has not being initialized</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if buffer address not valid, for example, unaligned address with no DRE built in the hardware </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaaf3790410e85baac4ef181f1b77c8cdf">XAxiVdma_ChannelHiFrmAddrDisable</a>, <a class="el" href="group__axivdma.html#gac1022ff84a093476cff8499bc4bbaae2">XAxiVdma_ChannelHiFrmAddrEnable</a>, <a class="el" href="group__axivdma.html#ga74cbf8945ca6cf9175bac9d7ad21a1bf">XAXIVDMA_MAX_FRAMESTORE</a>, <a class="el" href="group__axivdma.html#gaed6082e7154b873435b6e0cbd6f7bf03">XAXIVDMA_MAX_FRAMESTORE_64</a>, <a class="el" href="group__axivdma.html#gaba552b4bc0c96fb9d76ef37e9fc34da7">XAXIVDMA_START_ADDR_LEN</a>, <a class="el" href="group__axivdma.html#ga83c97295f4a50d39cacbb32fa928ea95">XAXIVDMA_START_ADDR_MSB_OFFSET</a>, <a class="el" href="group__axivdma.html#ga73ce4a1f2caf365b8c54cd77827a29cc">XAXIVDMA_START_ADDR_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, and <a class="el" href="group__axivdma.html#ga8fa5b3e7978fda9bde7498a9d4af3c73">XAxiVdma_DmaSetBufferAddr()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelSetFrmCnt </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FrmCnt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>DlyCnt</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set the frame counter and delay counter for one channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">FrmCnt</td><td>is the frame counter value to be set </td></tr>
    <tr><td class="paramname">DlyCnt</td><td>is the delay counter value to be set</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setup finishes successfully</li>
<li>XST_FAILURE if channel is not initialized</li>
<li>XST_INVALID_PARAM if the configuration structure has invalid values</li>
<li>XST_NO_FEATURE if Frame Counter or Delay Counter is disabled </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gac556991d9307f211f770d15a117ee937">XAXIVDMA_DELAY_MASK</a>, <a class="el" href="group__axivdma.html#gaf4ab4ba9a0c2984efad7fefe195fe0ed">XAXIVDMA_FRMCNT_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelStart </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE if channel is not initialized</li>
<li>XST_DMA_ERROR if: . The DMA channel fails to stop . The DMA channel fails to start</li>
<li>XST_DEVICE_BUSY is the channel is doing transfers </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga36d711874a8831f2b134a377488aefd2">XAXIVDMA_CDESC_OFFSET</a>, <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gaf6165b2a5668ffbfe3320c83f1a3ffaa">XAXIVDMA_CR_RUNSTOP_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga8a1e429317226b3d7a3e9ee29688c3ab">XAXIVDMA_TDESC_OFFSET</a>, <a class="el" href="group__axivdma.html#ga4feada9ad41cf079a8c9b7c6aebfecff">XAXIVDMA_VSIZE_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, and <a class="el" href="group__axivdma.html#gadf310ae3bd4c0ae9ebf3e445a2fbe444">XAxiVdma_DmaStart()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelStartFrmCntEnable </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set the channel to run in frame count enable mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gabfed305b44e791eaae8142ab94bd0ba9">XAXIVDMA_CR_FRMCNT_EN_MASK</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga4f05c5a75fdf840517c17d687443510d">XAxiVdma_StartFrmCntEnable()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelStartParking </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set the channel to run in parking mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if everything is fine</li>
<li>XST_FAILURE if hardware is not running </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga6bda812084d25429b793e441c698298d">XAXIVDMA_CR_TAIL_EN_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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          <td class="memname">int XAxiVdma_ChannelStartTransfer </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">XAxiVdma_ChannelSetup *&#160;</td>
          <td class="paramname"><em>ChannelCfgPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Start a transfer. </p>
<p>This function setup the DMA engine and start the engine to do the transfer.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on </td></tr>
    <tr><td class="paramname">ChannelCfgPtr</td><td>is the pointer to the setup structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS for a successful submission</li>
<li>XST_FAILURE if channel has not being initialized</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if parameters in config structure not valid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>, and <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#gab2646b6aeea2ff64c4b42319ffb49804">XAxiVdma_StartReadFrame()</a>, and <a class="el" href="group__axivdma.html#ga1dc126d885558e03cf06a4d9c05d5668">XAxiVdma_StartWriteFrame()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelStop </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Stop one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gaf6165b2a5668ffbfe3320c83f1a3ffaa">XAXIVDMA_CR_RUNSTOP_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga133b5fd1032db27366382885d6d76484">XAxiVdma_DmaStop()</a>.</p>

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          <td class="memname">void XAxiVdma_ChannelStopParking </td>
          <td>(</td>
          <td class="paramtype">XAxiVdma_Channel *&#160;</td>
          <td class="paramname"><em>Channel</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Set the channel to run in circular mode, exiting parking mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">Channel</td><td>is the pointer to the channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga6bda812084d25429b793e441c698298d">XAXIVDMA_CR_TAIL_EN_MASK</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga8625bbc0ed0ab829f3153160c74bba44">XAxiVdma_StopParking()</a>.</p>

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          <td class="memname">int XAxiVdma_ClearDmaChannelErrors </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ErrorMask</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Clear DMA Channel Errors. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance to operate on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE </td></tr>
    <tr><td class="paramname">ErrorMask</td><td>is the mask of error bits to clear</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- XST_SUCCESS, when error bits are cleared.<ul>
<li>XST_INVALID_PARAM, when channel pointer is invalid.</li>
<li>XST_DEVICE_NOT_FOUND, when the channel is not valid.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">u32 XAxiVdma_CurrFrameStore </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Get the current frame that hardware is working on. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The current frame that the hardware is working on</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If returned frame number is out of range, then the channel is invalid </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a>, <a class="el" href="group__axivdma.html#ga311f4eadce692b10effb8cd492b2120c">XAXIVDMA_PARKPTR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga3326b79c706c90993eea1033edc5f304">XAXIVDMA_PARKPTR_READSTR_MASK</a>, <a class="el" href="group__axivdma.html#gafdf5ab4a765d1ed93a697b276d832b7d">XAXIVDMA_PARKPTR_WRTSTR_MASK</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

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          <td class="memname">int XAxiVdma_DmaConfig </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *&#160;</td>
          <td class="paramname"><em>DmaConfigPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Configure one DMA channel using the configuration structure. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on </td></tr>
    <tr><td class="paramname">DmaConfigPtr</td><td>is the pointer to the setup structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if buffer address not valid, for example, unaligned address with no DRE built in the hardware, or Direction invalid</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga74ab4785d21c80a0d4501f0d985213e4">XAxiVdma_ChannelConfig()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">void XAxiVdma_DmaRegisterDump </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Dump registers of one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then do nothing on that channel </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga13807c40f1f871a6b2f7cbde9eeab9a8">XAxiVdma_ChannelRegisterDump()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">int XAxiVdma_DmaSetBufferAddr </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">UINTPTR *&#160;</td>
          <td class="paramname"><em>BufferAddrSet</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Configure buffer addresses for one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on </td></tr>
    <tr><td class="paramname">BufferAddrSet</td><td>is the set of addresses for the transfers</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if buffer address not valid, for example, unaligned address with no DRE built in the hardware, or Direction invalid</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga14da4fd85b6e6c8009479634bca8527a">XAxiVdma_ChannelSetBufferAddr()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">int XAxiVdma_DmaStart </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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<p>Start one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if channel started successfully</li>
<li>XST_FAILURE otherwise</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid</li>
<li>XST_INVALID_PARAM if Direction invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga91cec5aee2b7126eb128169ddd2b4b4f">XAxiVdma_ChannelStart()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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<p>Stop one DMA channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then do nothing on that channel </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga12bb1b451a69ecfc70f55d4fbf7257b0">XAxiVdma_ChannelStop()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Source</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td></td>
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<p>Configure Frame Sync Source and valid only when C_USE_FSYNC is enabled. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Source</td><td>is the value to set the source of Frame Sync </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE if C_USE_FSYNC is disabled. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga2158cdab0215f4079c14741e1af43c5d">XAxiVdma::UseFsync</a>, <a class="el" href="group__axivdma.html#ga001373abfc5971ca63943b4088f58e60">XAXIVDMA_CHAN_FSYNC</a>, <a class="el" href="group__axivdma.html#ga7af6342cb5f43fa2036b3fbc8be1a082">XAXIVDMA_CR_FSYNC_SRC_MASK</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

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          <td class="memname">int XAxiVdma_GenLockSourceSelect </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>Source</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td>)</td>
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<p>Configure Gen Lock Source. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Source</td><td>is the value to set the source of Gen Lock </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE if the channel is in GenLock Master Mode. if C_INCLUDE_INTERNAL_GENLOCK is disabled. </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gac5806353d2211d78f4c963dd7b018ac9">XAxiVdma::HasMm2S</a>, <a class="el" href="group__axivdma.html#ga22a700bda0eb14878a0c343fbac77456">XAxiVdma::HasS2Mm</a>, <a class="el" href="group__axivdma.html#ga3af417807133e29a55867f9c853fa25b">XAxiVdma::InternalGenLock</a>, <a class="el" href="group__axivdma.html#gac2bf28150cc3fc0d8cd0fceeedf60554">XAXIVDMA_CR_GENLCK_SRC_MASK</a>, <a class="el" href="group__axivdma.html#gadb4ad98d2088b8488c6ec4e519449e36">XAXIVDMA_CR_OFFSET</a>, <a class="el" href="group__axivdma.html#gae49d9133e0ce94d33014c1277b1a4002">XAXIVDMA_EXTERNAL_GENLOCK</a>, <a class="el" href="group__axivdma.html#ga36e2b755a604e36829faf28153035830">XAXIVDMA_GENLOCK_MASTER</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

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          <td class="memname">XAxiVdma_Channel * XAxiVdma_GetChannel </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Get a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the direction for the channel to get</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The pointer to the channel. Upon error, return NULL.</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Since this function is internally used, we assume Direction is valid </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga1534da961a034f0aa6ea9fee0702e7f0">XAxiVdma::ReadChannel</a>, <a class="el" href="group__axivdma.html#ga606f7921a2a8cf10cfdcf34ee2e82d0a">XAxiVdma::WriteChannel</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gac01b1199d15a3a95cafb01f61dd1d0d3">XAxiVdma_ClearDmaChannelErrors()</a>, <a class="el" href="group__axivdma.html#ga3c50e96d431d9f1ee7d6200266c0dbd3">XAxiVdma_DmaConfig()</a>, <a class="el" href="group__axivdma.html#gab51f0d1f195db6af2dd3023e5c80eb5c">XAxiVdma_DmaRegisterDump()</a>, <a class="el" href="group__axivdma.html#ga8fa5b3e7978fda9bde7498a9d4af3c73">XAxiVdma_DmaSetBufferAddr()</a>, <a class="el" href="group__axivdma.html#gadf310ae3bd4c0ae9ebf3e445a2fbe444">XAxiVdma_DmaStart()</a>, <a class="el" href="group__axivdma.html#ga133b5fd1032db27366382885d6d76484">XAxiVdma_DmaStop()</a>, <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, <a class="el" href="group__axivdma.html#ga4d93d3dea2f117948c175371d983a0e1">XAxiVdma_GetDmaChannelErrors()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, <a class="el" href="group__axivdma.html#ga83d55bee4a575b0fdd98d1013a26533e">XAxiVdma_GetFrmStore()</a>, <a class="el" href="group__axivdma.html#ga15653f0679e3a33efd384598b6c42e08">XAxiVdma_GetStatus()</a>, <a class="el" href="group__axivdma.html#gaaba3bd6f623637f15e16176ea77213b3">XAxiVdma_IntrClear()</a>, <a class="el" href="group__axivdma.html#gaba9a0ebdb72696e24ccaa48e57802323">XAxiVdma_IntrDisable()</a>, <a class="el" href="group__axivdma.html#ga4c687431dde198458fb4e42dff22c106">XAxiVdma_IntrEnable()</a>, <a class="el" href="group__axivdma.html#ga90501638e7f1077232443f0a60b3b40d">XAxiVdma_IntrGetPending()</a>, <a class="el" href="group__axivdma.html#ga0fc5b39aabb8d4f56b0dd2024ea5bff2">XAxiVdma_IsBusy()</a>, <a class="el" href="group__axivdma.html#ga2650d7820ff062709d027bff2934cf58">XAxiVdma_MaskS2MMErrIntr()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#ga8dbd2faa070ca571f049e3b61f9bdb1e">XAxiVdma_Reset()</a>, <a class="el" href="group__axivdma.html#ga3e01bd69f101126d5962f7078ee3e520">XAxiVdma_ResetNotDone()</a>, <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>, <a class="el" href="group__axivdma.html#gab14c0b0487aeb3347b289eb58453e75d">XAxiVdma_SetBdAddrs()</a>, <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>, <a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore()</a>, <a class="el" href="group__axivdma.html#ga741b4b1607c2ee71a3be16ddd8300656">XAxiVdma_SetLineBufThreshold()</a>, <a class="el" href="group__axivdma.html#ga4f05c5a75fdf840517c17d687443510d">XAxiVdma_StartFrmCntEnable()</a>, <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>, <a class="el" href="group__axivdma.html#gab2646b6aeea2ff64c4b42319ffb49804">XAxiVdma_StartReadFrame()</a>, <a class="el" href="group__axivdma.html#ga1dc126d885558e03cf06a4d9c05d5668">XAxiVdma_StartWriteFrame()</a>, <a class="el" href="group__axivdma.html#ga8625bbc0ed0ab829f3153160c74bba44">XAxiVdma_StopParking()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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          <td class="memname">int XAxiVdma_GetDmaChannelErrors </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td>)</td>
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<p>Check for DMA Channel Errors. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance to operate on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- Errors seen on the channel<ul>
<li>XST_INVALID_PARAM, when channel pointer is invalid.</li>
<li>XST_DEVICE_NOT_FOUND, when the channel is not valid.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">void XAxiVdma_GetFrameCounter </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___frame_counter.html">XAxiVdma_FrameCounter</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>&#160;</td>
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<p>Get the frame counter and delay counter for both channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is the configuration structure to contain return values</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If returned frame counter value is 0, then the channel is not valid </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga8b4441757224aa73135d6ed334bacdb5">XAxiVdma::IsReady</a>, <a class="el" href="group__axivdma.html#ga03ffbe1551620b7f0f72b905006dcf88">XAxiVdma_FrameCounter::ReadDelayTimerCount</a>, <a class="el" href="group__axivdma.html#gaa60c173f1c6d7314821ae2c24e2ff7af">XAxiVdma_FrameCounter::ReadFrameCount</a>, <a class="el" href="group__axivdma.html#gad55f207b3d4bfab082a90ea7a43f044c">XAxiVdma_FrameCounter::WriteDelayTimerCount</a>, <a class="el" href="group__axivdma.html#gab43078f5f7fdd17728ac6ecfb97aea27">XAxiVdma_FrameCounter::WriteFrameCount</a>, <a class="el" href="group__axivdma.html#ga3e90ef720feb2a974511d7e2889a2198">XAxiVdma_ChannelGetFrmCnt()</a>, <a class="el" href="group__axivdma.html#gafa8a6604771dc02e3a96eb09ac16fcaa">XAXIVDMA_DEVICE_READY</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

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          <td class="memname">void XAxiVdma_GetFrmStore </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8 *&#160;</td>
          <td class="paramname"><em>FrmStoreNum</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Get the number of frame store buffers to use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance to operate on </td></tr>
    <tr><td class="paramname">FrmStoreNum</td><td>is the number of frame store buffers to use. </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gacc02fa25db65faceed9fd49ee88fb609">XAXIVDMA_FRMSTORE_OFFSET</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, and <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>.</p>

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          <td class="memname">u32 XAxiVdma_GetStatus </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Get the status of a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The status of the channel</dd></dl>
<dl class="section note"><dt>Note</dt><dd>An invalid return value indicates that channel is invalid </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gae429b7acc7449fcb805ae013528c9ba0">XAxiVdma_ChannelGetStatus()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">u32 XAxiVdma_GetVersion </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Get the version of the hardware. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The version of the hardware </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga727fc3fe53b19cda302295ad25fe71a2">XAXIVDMA_VERSION_OFFSET</a>.</p>

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          <td class="memname">void XAxiVdma_IntrClear </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
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<p>Clear the pending interrupts specified by the bit mask. </p>
<p>Interrupts not specified by the mask will not be affected</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel, use XAXIVDMA_READ or XAXIVDMA_WRITE </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the bit mask for the interrupts to be cleared</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then nothing is done </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">void XAxiVdma_IntrDisable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Disable specific interrupts for a channel. </p>
<p>Interrupts not specified by the mask will not be affected</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the bit mask for the interrupts to be disabled </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel, use XAXIVDMA_READ or XAXIVDMA_WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then nothing is done </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga2daa8c45a82867bedf786957b4154cdc">XAxiVdma_ChannelDisableIntr()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">void XAxiVdma_IntrEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>IntrType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Enable specific interrupts for a channel. </p>
<p>Interrupts not specified by the mask will not be affected</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel, use XAXIVDMA_READ or XAXIVDMA_WRITE </td></tr>
    <tr><td class="paramname">IntrType</td><td>is the bit mask for the interrupts to be enabled</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then nothing is done </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga64d6b39bc9e900efe9f14c9961f4da24">XAxiVdma_ChannelEnableIntr()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname">u32 XAxiVdma_IntrGetPending </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Get the pending interrupts of a channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel, use XAXIVDMA_READ or XAXIVDMA_WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The bit mask for the currently pending interrupts</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If Direction is invalid, return 0 </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">int XAxiVdma_IsBusy </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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<p>Check whether a DMA channel is busy. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>Non-zero if the channel is busy</li>
<li>Zero if the channel is idle </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaaf57ab476eb91e9f41b6d166d2b2d6bb">XAxiVdma_ChannelIsBusy()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname"><a class="el" href="struct_x_axi_vdma___config.html">XAxiVdma_Config</a> * XAxiVdma_LookupConfig </td>
          <td>(</td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>DeviceId</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Look up the hardware configuration for a device instance. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">DeviceId</td><td>is the unique device ID of the device to lookup for</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>The configuration structure for the device. If the device ID is not found, a NULL pointer is returned. </dd></dl>

<p>Referenced by <a class="el" href="xaxivdma__example__selftest_8c.html#a2bc69805483ffec0bc6e4115a9e2375a">AxiVDMASelfTestExample()</a>, <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname">int XAxiVdma_MaskS2MMErrIntr </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>ErrorMask</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
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      </table>
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<p>Masks the S2MM error interrupt for the provided error mask value. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance to operate on </td></tr>
    <tr><td class="paramname">ErrorMask</td><td>is the mask of error bits for which S2MM error interrupt can be disabled. </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- XST_SUCCESS, when error bits are cleared.<ul>
<li>XST_INVALID_PARAM, when channel pointer is invalid.</li>
<li>XST_DEVICE_NOT_FOUND, when the channel is not valid.</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>The register S2MM_DMA_IRQ_MASK is only applicable from IPv6.01a which is added at offset XAXIVDMA_S2MM_DMA_IRQ_MASK_OFFSET. For older versions, this offset location is reserved and so the API does not have any effect. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gae3281565e12c47c4888e228ec6a59e3c">XAXIVDMA_S2MM_DMA_IRQ_MASK_OFFSET</a>, <a class="el" href="group__axivdma.html#ga0ba0af99c40314b1288a6a95ba2ee688">XAXIVDMA_S2MM_IRQ_ERR_ALL_MASK</a>, <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

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          <td class="memname">void XAxiVdma_ReadIntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Interrupt handler for the read channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If the channel is invalid, then no interrupt handling </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaf3e1965613b2d1a437d798e8a37df333">XAxiVdma_ChannelCallBack::CompletionCallBack</a>, <a class="el" href="group__axivdma.html#ga43dc909946c675490c5380e7f8f90ede">XAxiVdma_ChannelCallBack::CompletionRef</a>, <a class="el" href="group__axivdma.html#ga8bde9bc1e0f2871e63eebff6b4d3a11f">XAxiVdma_ChannelCallBack::ErrCallBack</a>, <a class="el" href="group__axivdma.html#gaa39f1f408770ba9a38f520a0c0df5c48">XAxiVdma_ChannelCallBack::ErrRef</a>, <a class="el" href="group__axivdma.html#gac2cdde8d751e11e934ecea898574e99a">XAxiVdma::ReadCallBack</a>, <a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr()</a>, <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gaed70612ee26f1faf7699e301afda8048">XAXIVDMA_IXR_COMPLETION_MASK</a>, <a class="el" href="group__axivdma.html#ga88ccc9e37f16a1b4ecffd5e09a4c8cfb">XAXIVDMA_IXR_ERROR_MASK</a>, and <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">void XAxiVdma_Reset </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>This function resets one DMA channel. </p>
<p>The registers will be default values after the reset</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>Due to undeterminism of system delays, check the reset status through <a class="el" href="group__axivdma.html#ga3e01bd69f101126d5962f7078ee3e520" title="This function checks one DMA channel for reset completion. ">XAxiVdma_ResetNotDone()</a>. If direction is invalid, do nothing. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">int XAxiVdma_ResetNotDone </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>This function checks one DMA channel for reset completion. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>0 if reset is done</li>
<li>1 if reset is ongoing</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>We do not check for channel validity, because channel is marked as invalid before reset is done </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">int XAxiVdma_Selftest </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
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<p>Runs a self-test on the driver/device. </p>
<p>This test perform a reset of the VDMA device and checks the device is coming out of reset or not</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is a pointer to the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance.</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if self-test was successful</li>
</ul>
</dd></dl>
<ul>
<li>XST_FAILURE if the device is not coming out of reset.</li>
</ul>
<dl class="section note"><dt>Note</dt><dd>None. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a>, <a class="el" href="group__axivdma.html#gac5806353d2211d78f4c963dd7b018ac9">XAxiVdma::HasMm2S</a>, <a class="el" href="group__axivdma.html#ga22a700bda0eb14878a0c343fbac77456">XAxiVdma::HasS2Mm</a>, <a class="el" href="group__axivdma.html#ga96e2798de16d738f378458fa2b7b2f1c">XAxiVdma_ChannelReset()</a>, <a class="el" href="group__axivdma.html#ga9b0a1008f3e30f3f031763f108f76405">XAxiVdma_ChannelResetNotDone()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, <a class="el" href="group__axivdma.html#gab97c05cd73a22a627177554199efb526">XAXIVDMA_RX_OFFSET</a>, <a class="el" href="group__axivdma.html#gae1497f30a25302cb0f4ec93a16a23100">XAXIVDMA_TX_OFFSET</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__selftest_8c.html#a2bc69805483ffec0bc6e4115a9e2375a">AxiVDMASelfTestExample()</a>.</p>

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          <td class="memname">int XAxiVdma_SetBdAddrs </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BdAddrPhys</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>BdAddrVirt</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>NumBds</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set BD addresses to be different. </p>
<p>In some systems, it is convenient to put BDs into a certain region of the memory. This function enables that.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">BdAddrPhys</td><td>is the physical starting address for BDs </td></tr>
    <tr><td class="paramname">BdAddrVirt</td><td>is the Virtual starting address for BDs. For systems that do not use MMU, then virtual address is the same as physical address </td></tr>
    <tr><td class="paramname">NumBds</td><td>is the number of BDs to setup with. This is required to be the same as the number of frame stores for that channel </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel direction</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS for a successful setup</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVALID_PARAM if parameters not valid</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid</li>
</ul>
</dd></dl>
<p>We assume that the memory region starting from BdAddrPhys and BdAddrVirt are large enough to hold all the BDs. </p>

<p>References <a class="el" href="group__axivdma.html#ga6f1b98d0a6280da333bc1a97adea974e">XAXIVDMA_BD_MINIMUM_ALIGNMENT</a>, <a class="el" href="group__axivdma.html#ga1703c6dcef193966f4f1db7e6e9e59ce">XAxiVdma_ChannelSetBdAddrs()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u32&#160;</td>
          <td class="paramname"><em>HandlerType</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackFunc</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>CallBackRef</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td>)</td>
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<p>Set call back function and call back reference pointer for one channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">HandlerType</td><td>is the interrupt type that this callback handles </td></tr>
    <tr><td class="paramname">CallBackFunc</td><td>is the call back function pointer </td></tr>
    <tr><td class="paramname">CallBackRef</td><td>is the call back reference pointer </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel, use XAXIVDMA_READ or XAXIVDMA_WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if everything is fine</li>
<li>XST_INVALID_PARAM if the handler type or direction invalid</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>This function overwrites the existing interrupt handler and its reference pointer. The function sets the handlers even if the channels are invalid. </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaf3e1965613b2d1a437d798e8a37df333">XAxiVdma_ChannelCallBack::CompletionCallBack</a>, <a class="el" href="group__axivdma.html#ga43dc909946c675490c5380e7f8f90ede">XAxiVdma_ChannelCallBack::CompletionRef</a>, <a class="el" href="group__axivdma.html#ga8bde9bc1e0f2871e63eebff6b4d3a11f">XAxiVdma_ChannelCallBack::ErrCallBack</a>, <a class="el" href="group__axivdma.html#gaa39f1f408770ba9a38f520a0c0df5c48">XAxiVdma_ChannelCallBack::ErrRef</a>, <a class="el" href="group__axivdma.html#ga8b4441757224aa73135d6ed334bacdb5">XAxiVdma::IsReady</a>, <a class="el" href="group__axivdma.html#gac2cdde8d751e11e934ecea898574e99a">XAxiVdma::ReadCallBack</a>, <a class="el" href="group__axivdma.html#gae92ec1b3f2075167e0f552a75ecfde46">XAxiVdma::WriteCallBack</a>, <a class="el" href="group__axivdma.html#gafa8a6604771dc02e3a96eb09ac16fcaa">XAXIVDMA_DEVICE_READY</a>, <a class="el" href="group__axivdma.html#ga7ed954b5de3073f15b8e47c5736d627b">XAXIVDMA_HANDLER_ERROR</a>, <a class="el" href="group__axivdma.html#ga4c57db0180eafe041035a8d4781cb2b9">XAXIVDMA_HANDLER_GENERAL</a>, and <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">int XAxiVdma_SetFrameCounter </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___frame_counter.html">XAxiVdma_FrameCounter</a> *&#160;</td>
          <td class="paramname"><em>CfgPtr</em>&#160;</td>
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          <td></td>
          <td>)</td>
          <td></td><td></td>
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<p>Set the frame counter and delay counter for both channels. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">CfgPtr</td><td>is the pointer to the configuration structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if setup finishes successfully</li>
<li>XST_INVALID_PARAM if the configuration structure has invalid values</li>
<li>Others if setting channel frame counter fails</li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then do nothing on that channel </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga8b4441757224aa73135d6ed334bacdb5">XAxiVdma::IsReady</a>, <a class="el" href="group__axivdma.html#ga03ffbe1551620b7f0f72b905006dcf88">XAxiVdma_FrameCounter::ReadDelayTimerCount</a>, <a class="el" href="group__axivdma.html#gaa60c173f1c6d7314821ae2c24e2ff7af">XAxiVdma_FrameCounter::ReadFrameCount</a>, <a class="el" href="group__axivdma.html#gad55f207b3d4bfab082a90ea7a43f044c">XAxiVdma_FrameCounter::WriteDelayTimerCount</a>, <a class="el" href="group__axivdma.html#gab43078f5f7fdd17728ac6ecfb97aea27">XAxiVdma_FrameCounter::WriteFrameCount</a>, <a class="el" href="group__axivdma.html#ga524861abb42dc3da2ed14d5932a3bb5b">XAxiVdma_ChannelSetFrmCnt()</a>, <a class="el" href="group__axivdma.html#gafa8a6604771dc02e3a96eb09ac16fcaa">XAXIVDMA_DEVICE_READY</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname">int XAxiVdma_SetFrmStore </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u8&#160;</td>
          <td class="paramname"><em>FrmStoreNum</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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<p>Set the number of frame store buffers to use. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the <a class="el" href="struct_x_axi_vdma.html" title="The XAxiVdma driver instance data. ">XAxiVdma</a> instance to operate on </td></tr>
    <tr><td class="paramname">FrmStoreNum</td><td>is the number of frame store buffers to use. </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>- XST_SUCCESS if operation is successful<ul>
<li>XST_FAILURE if operation fails.</li>
<li>XST_NO_FEATURE if access to FrameStore register is disabled </li>
</ul>
</dd></dl>
<dl class="section note"><dt>Note</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gac5420b0f3823998ce975acbaf1c174b2">XAxiVdma::MaxNumFrames</a>, <a class="el" href="group__axivdma.html#ga795e26fb85aa4140db060d731a19efeb">XAxiVdma_ChannelInit()</a>, <a class="el" href="group__axivdma.html#gacc02fa25db65faceed9fd49ee88fb609">XAXIVDMA_FRMSTORE_OFFSET</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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          <td class="memname">int XAxiVdma_SetLineBufThreshold </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>LineBufThreshold</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td></td>
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<p>Configure Line Buffer Threshold. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">LineBufThreshold</td><td>is the value to set threshold </td></tr>
    <tr><td class="paramname">Direction</td><td>is the DMA channel to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if successful</li>
<li>XST_FAILURE otherwise</li>
<li>XST_NO_FEATURE if access to Threshold register is disabled </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#gad1bc694180b959ab0794ac6c4468a8ba">XAXIVDMA_BUFTHRES_OFFSET</a>, <a class="el" href="group__axivdma.html#gaef1fd25fb7d569716f06428a2cb252a6">XAXIVDMA_ENABLE_DBG_THRESHOLD_REG</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

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          <td class="memname">void XAxiVdma_StartFrmCntEnable </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
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          <td></td>
          <td>)</td>
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<p>Start frame count enable on one channel. </p>
<p>This is needed to start limiting the number of frames to transfer so that software can check the data etc after hardware stops transfer.</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None </dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga771725985f20173546d5555fb8806a6c">XAxiVdma_ChannelStartFrmCntEnable()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">int XAxiVdma_StartParking </td>
          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
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          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">int&#160;</td>
          <td class="paramname"><em>FrameIndex</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype">u16&#160;</td>
          <td class="paramname"><em>Direction</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Start parking mode on a certain frame. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">FrameIndex</td><td>is the frame to park on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS if everything is fine</li>
<li>XST_INVALID_PARAM if . channel is invalid . FrameIndex is invalid . Direction is invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga593206ce099f13c6a62e8c1c95f65b0c">XAxiVdma::BaseAddr</a>, <a class="el" href="group__axivdma.html#ga04f4bf5ac18661ceb9c1ef047949e3d8">XAxiVdma_ChannelStartParking()</a>, <a class="el" href="group__axivdma.html#ga7e274c9f02af4538043f757c3e224a91">XAXIVDMA_FRM_MAX</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#ga311f4eadce692b10effb8cd492b2120c">XAXIVDMA_PARKPTR_OFFSET</a>, <a class="el" href="group__axivdma.html#ga39001a9b8ae972fc53463961ca423ac1">XAXIVDMA_PARKPTR_READREF_MASK</a>, <a class="el" href="group__axivdma.html#ga9656852c690e3a7e5253fe67b87f10cf">XAXIVDMA_PARKPTR_WRTREF_MASK</a>, <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>, <a class="el" href="group__axivdma.html#gac657067221649df8f259f9215bfba75e">XAxiVdma_ReadReg</a>, <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>, and <a class="el" href="group__axivdma.html#ga28900a15d22fc5a3729dfa102f5cbec9">XAxiVdma_WriteReg</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *&#160;</td>
          <td class="paramname"><em>DmaConfigPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Start a read operation. </p>
<p>Read corresponds to send data from memory to device</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">DmaConfigPtr</td><td>is the pointer to the setup structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS for a successful submission</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if parameters in config structure not valid</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, and <a class="el" href="group__axivdma.html#ga5fa27b3ce66d947167262fe918fb5373">XAXIVDMA_READ</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
        </tr>
        <tr>
          <td class="paramkey"></td>
          <td></td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma___dma_setup.html">XAxiVdma_DmaSetup</a> *&#160;</td>
          <td class="paramname"><em>DmaConfigPtr</em>&#160;</td>
        </tr>
        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Start a write operation. </p>
<p>Write corresponds to send data from device to memory</p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">DmaConfigPtr</td><td>is the pointer to the setup structure</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd><ul>
<li>XST_SUCCESS for a successful submission</li>
<li>XST_DEVICE_BUSY if the DMA channel is not idle, BDs are still being used</li>
<li>XST_INVAID_PARAM if parameters in config structure not valid</li>
<li>XST_DEVICE_NOT_FOUND if the channel is invalid </li>
</ul>
</dd></dl>

<p>References <a class="el" href="group__axivdma.html#ga3b9c24a02c4b4f99d40820a647de811d">XAxiVdma_ChannelStartTransfer()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

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          <td>(</td>
          <td class="paramtype"><a class="el" href="struct_x_axi_vdma.html">XAxiVdma</a> *&#160;</td>
          <td class="paramname"><em>InstancePtr</em>, </td>
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          <td class="paramname"><em>Direction</em>&#160;</td>
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        <tr>
          <td></td>
          <td>)</td>
          <td></td><td></td>
        </tr>
      </table>
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<p>Exit parking mode, the channel will return to circular buffer mode. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on </td></tr>
    <tr><td class="paramname">Direction</td><td>is the channel to work on, use XAXIVDMA_READ/WRITE</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If channel is invalid, then do nothing </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gacd5a402e30c5170d9dab22d16ff01336">XAxiVdma_ChannelStopParking()</a>, and <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">void XAxiVdma_WriteIntrHandler </td>
          <td>(</td>
          <td class="paramtype">void *&#160;</td>
          <td class="paramname"><em>InstancePtr</em></td><td>)</td>
          <td></td>
        </tr>
      </table>
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<p>Interrupt handler for the write channel. </p>
<dl class="params"><dt>Parameters</dt><dd>
  <table class="params">
    <tr><td class="paramname">InstancePtr</td><td>is the pointer to the DMA engine to work on</td></tr>
  </table>
  </dd>
</dl>
<dl class="section return"><dt>Returns</dt><dd>None</dd></dl>
<dl class="section note"><dt>Note</dt><dd>If the channel is invalid, then no interrupt handling </dd></dl>

<p>References <a class="el" href="group__axivdma.html#gaf3e1965613b2d1a437d798e8a37df333">XAxiVdma_ChannelCallBack::CompletionCallBack</a>, <a class="el" href="group__axivdma.html#ga43dc909946c675490c5380e7f8f90ede">XAxiVdma_ChannelCallBack::CompletionRef</a>, <a class="el" href="group__axivdma.html#ga8bde9bc1e0f2871e63eebff6b4d3a11f">XAxiVdma_ChannelCallBack::ErrCallBack</a>, <a class="el" href="group__axivdma.html#gaa39f1f408770ba9a38f520a0c0df5c48">XAxiVdma_ChannelCallBack::ErrRef</a>, <a class="el" href="group__axivdma.html#gae92ec1b3f2075167e0f552a75ecfde46">XAxiVdma::WriteCallBack</a>, <a class="el" href="group__axivdma.html#gaccc8d62d87870cb43c048938e405d4e6">XAxiVdma_ChannelGetEnabledIntr()</a>, <a class="el" href="group__axivdma.html#ga361297a60672ab2552754d8a58d3f7ab">XAxiVdma_ChannelGetPendingIntr()</a>, <a class="el" href="group__axivdma.html#ga7a8c557bce703f572d4e2dd9e362f489">XAxiVdma_ChannelIntrClear()</a>, <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>, <a class="el" href="group__axivdma.html#gaed70612ee26f1faf7699e301afda8048">XAXIVDMA_IXR_COMPLETION_MASK</a>, <a class="el" href="group__axivdma.html#ga88ccc9e37f16a1b4ecffd5e09a4c8cfb">XAXIVDMA_IXR_ERROR_MASK</a>, and <a class="el" href="group__axivdma.html#ga525d0fa8fc04a9dde871ab55cf6b227b">XAXIVDMA_WRITE</a>.</p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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<h2 class="groupheader">Variable Documentation</h2>
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<p>Address Width. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Address Width. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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          <td class="memname">UINTPTR XAxiVdma::BaseAddr</td>
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<p>Memory address for this device. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga9769479907cda3ef95ff1ed394de4629">XAxiVdma_CurrFrameStore()</a>, <a class="el" href="group__axivdma.html#ga24f182cf8678e4df6e0e2b19e2f50620">XAxiVdma_GetVersion()</a>, <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>, and <a class="el" href="group__axivdma.html#gaf99dd7738b98367397831df26433843a">XAxiVdma_StartParking()</a>.</p>

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<p><pre class="fragment">    BaseAddress is the physical base address of the
</pre><p> device's registers </p>

<p>Referenced by <a class="el" href="xaxivdma__example__selftest_8c.html#a2bc69805483ffec0bc6e4115a9e2375a">AxiVDMASelfTestExample()</a>, <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>.</p>

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          <td class="memname"><a class="el" href="group__axivdma.html#ga07f81ffdbceb0024e3a675a787ca3d90">XAxiVdma_CallBack</a> XAxiVdma_ChannelCallBack::CompletionCallBack</td>
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<p>Call back for completion intr. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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<p>Call back ref. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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<p>DeviceId is the unique ID of the device. </p>

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<p>Enable all Debug features This corresponds to C_ENABLE_DEBUG_ALL configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Circular Buffer Mode? </p>

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<p>Frame Counter Enable. </p>

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<p>Gen-Lock Mode? </p>

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          <td class="memname">u8 XAxiVdma_DmaSetup::EnableVFlip</td>
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<p>Vertical Flip state. </p>

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<p>Read Enable for video parameters in direct register mode. </p>

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<p>Read Enable for video parameters in direct register mode. </p>

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          <td class="memname"><a class="el" href="group__axivdma.html#gaf4cafedb40698ffa21e672bf20ac3602">XAxiVdma_ErrorCallBack</a> XAxiVdma_ChannelCallBack::ErrCallBack</td>
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<p>Call back for error intr. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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<p>Call back ref. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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<p>Fixed Frame Store Address index. </p>

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<p><pre class="fragment">   VDMA Transactions are flushed &amp; channel states
</pre><p> reset on Frame Sync </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Frame Delay. </p>

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          <td class="memname">UINTPTR XAxiVdma_DmaSetup::FrameStoreStartAddr[<a class="el" href="group__axivdma.html#ga74cbf8945ca6cf9175bac9d7ad21a1bf">XAXIVDMA_MAX_FRAMESTORE</a>]</td>
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<p>Start Addresses of Frame Store Buffers. </p>

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<p>Gen-Lock Repeat? </p>

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<p>Whether hw build has read channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Whether hw build has read channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

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<p>Read channel supports unaligned transfer. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Whether read channel has DRE. </p>

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<p>Whether hw build has write channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Whether hw build has write channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>, and <a class="el" href="group__axivdma.html#ga97041abec8a49ee091440012fec1f7ca">XAxiVdma_Selftest()</a>.</p>

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<p>Write channel supports unaligned transfer. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Whether write channel has DRE. </p>

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<p>Whether hardware has SG engine. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Whether hardware has SG engine. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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          <td class="memname">u8 XAxiVdma_Config::HasVFlip</td>
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<p>Whether hardware has Vertical Flip enabled(c_enable_vert_flip) </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Horizontal size input. </p>

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<p>Internal Gen Lock. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Internal Gen Lock. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#gacf7ed6b0ef406b80e49ff25634f6d5f1">XAxiVdma_GenLockSourceSelect()</a>.</p>

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<p>Bits[11:0] Interrupt-id Bits[15:12] trigger type and level flags. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>.</p>

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<p>Whether driver is initialized. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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<p>The maximum number of Frame Stores. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, and <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Number of frames to work on. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#gaf331929e09bf1454dc2835b6ecc4ff30">XAxiVdma_SetFrmStore()</a>.</p>

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<p>Depth of Read Channel Line Buffer FIFO. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>MM2S Delay Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_6 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>MM2S Frame Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_7 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>MM2S Frame Store Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_5 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Mm2s Gen Lock Mode. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>MM2S TData Width. </p>

<p>Referenced by <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, and <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>MM2S Threshold Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_1 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Read channel word length. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Master we synchronize with. </p>

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          <td class="memname"><a class="el" href="struct_x_axi_vdma___channel_call_back.html">XAxiVdma_ChannelCallBack</a> XAxiVdma::ReadCallBack</td>
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<p>Call back for read channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#ga60ceb86226e513a16d6776a97fcfa50f">XAxiVdma_ReadIntrHandler()</a>, and <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>.</p>

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<p>Channel to read from memory. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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          <td class="memname">u8 XAxiVdma_FrameCounter::ReadDelayTimerCount</td>
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<p>Delay timer threshold for receive. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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          <td class="memname">u8 XAxiVdma_FrameCounter::ReadFrameCount</td>
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<p>Interrupt threshold for Receive. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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<p>Depth of Write Channel Line Buffer FIFO. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM Delay Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_14 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM Frame Counter (Control Reg) Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_15 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM Frame Store Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_13 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2Mm Gen Lock Mode. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM Start of Flag Enable. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM TData Width. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>S2MM Threshold Register Enable Flag This corresponds to C_ENABLE_DEBUG_INFO_9 configuration parameter. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Write channel word length. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>Stride. </p>

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<p>DMA operations synchronized to Frame Sync. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>.</p>

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<p>DMA operations synchronized to Frame Sync. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, and <a class="el" href="group__axivdma.html#gaa3376589f8781eec1f0d619e1a0d3078">XAxiVdma_FsyncSrcSelect()</a>.</p>

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<p>Vertical size input. </p>

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          <td class="memname"><a class="el" href="struct_x_axi_vdma___channel_call_back.html">XAxiVdma_ChannelCallBack</a> XAxiVdma::WriteCallBack</td>
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<p>Call back for write channel. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga7dff0c11a9aa88a19519734702904dca">XAxiVdma_CfgInitialize()</a>, <a class="el" href="group__axivdma.html#gafd0477fae9534ebd2d2e15cc8885642d">XAxiVdma_SetCallBack()</a>, and <a class="el" href="group__axivdma.html#gaad76f2f6ab41e322ddcd240d2af8140d">XAxiVdma_WriteIntrHandler()</a>.</p>

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<p>Channel to write to memory. </p>

<p>Referenced by <a class="el" href="group__axivdma.html#ga0eecc03385d10b80e8b17ff834033ac4">XAxiVdma_GetChannel()</a>.</p>

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<p>Delay timer threshold for transmit. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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<p>Interrupt threshold for transmit. </p>

<p>Referenced by <a class="el" href="xaxivdma__example__intr_8c.html#a840291bc02cba5474a4cb46a9b9566fe">main()</a>, <a class="el" href="vdma__api_8c.html#a8f3f4f8546399efc071f59f35f17bdfa">run_triple_frame_buffer()</a>, <a class="el" href="group__axivdma.html#gabb2cecf1628ce8f7b42ffca3608bdf70">XAxiVdma_GetFrameCounter()</a>, and <a class="el" href="group__axivdma.html#gaabe404c2a5c1483bc95be749c7540ba4">XAxiVdma_SetFrameCounter()</a>.</p>

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